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TCS37209 Datasheet(PDF) 62 Page - OSRAM GmbH |
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TCS37209 Datasheet(HTML) 62 Page - OSRAM GmbH |
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62 / 88 page  Datasheet, Public Page 61 [v5-00] 2023-Nov-27 Document Feedback TCS3720 − Register Overview AWTIME Register (Address 0xE7) Figure 88: AWTIME Register The AWTIME is implemented using a down counter and starts counting from very beginning of every ALS integration cycle. If enabled, AWTIME needs to be programmed greater than ATIME, otherwise ATIME takes precedence over AWTIME. AWTIME =Wait Cycles x 2.779ms. If AWLONG is enabled, then AWTIME = Wait Cycles x 2.779ms x12. Addr: 0xE7 AWTIME Bit Bit Name Default Access Bit Description 7:0 AWTIME 0x00 RW Value that specifies the wait time in 2.779ms increments. Value Wait Cycles Wait Time 0x00 1 2.779ms (33.346ms) 0x01 2 5.558ms (66.692ms) 0x02 3 8.336ms (100.038ms) …… … 0x1F 32 88.923ms (1.067s) …… … 0xFF 256 711.381ms (8.537s) |
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