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TCS37209 Datasheet(PDF) 47 Page - OSRAM GmbH |
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TCS37209 Datasheet(HTML) 47 Page - OSRAM GmbH |
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47 / 88 page ![]() Page 46 Datasheet, Public Document Feedback [v5-00] 2023-Nov-27 TCS3720 − Register O ver view CFG6 Register (Address 0xAE) Figure 62: CFG6 Register PWM_CFG Register (Address 0xB0) Figure 63: PWM_CFG Register Addr: 0xAE CFG6 Bit Bit Name Default Access Bit Description 7 Reserved 0 RW Reserved. Must be set to default value. 6 DISABLE_APC 1 RW Proximity automatic pulse control (APC) disable. 0 = APC enable 1 = APC disable This bit should be set to 1 when calibration needs to be performed 5:0 Reserved 111111 RW Reserved. Must be set to default value. Addr: 0xB0 PWM_CFG Bit Bit Name Default Access Bit Description 7:3 Reserved 00000 RW Reserved. Must be set to default value. 2:1 PWM_CHG_ DET_STP 00 RW PWM period change detection step. Once PWM period changes from previous cycle by step of period mentioned in the following table, PWM_CHG_ INT interrupt is generated if PWMIEN=1. PWM_PRD={PWM_PRD_H, PWM_PRD_L} Value Timing 0Compare with PWM_PRD[13:9] 1Compare with PWM_PRD[13:8] 2Compare with PWM_PRD[13:10] 3Compare with PWM_PRD[13:11] 0 PWM_IN_EN 0 Enable XRES as a PWM input pin. |
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