SN54LVTH16500, SN74LVTH16500

3.3V ABT 18BIT UNIVERSAL BUS TRANSCEIVERS

WITH 3STATE OUTPUTS

SCBS701F − JULY 1997 − REVISED SEPTEMBER 2003

2

POST OFFICE BOX 655303

description/ordering information (continued)

Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),

and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the devices operate in the transparent mode when

LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is

low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. OEAB is active high. When

OEAB is high, the B-port outputs are active. When OEAB is low, the B-port outputs are in the high-impedance

state.

Data flow for B to A is similar to that of A to B, but uses OEBA, LEBA, and CLKBA. The output enables are

complementary (OEAB is active high and OEBA is active low).

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

and OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by

the current-sinking/current-sourcing capability of the driver.

disables the outputs, preventing damaging current backflow through the devices when they are powered down.

The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

terminal assignments

12

34

5

6

A

A1

LEAB

OEAB

GND

CLKAB

B1

B

A3

A2

GND

GND

B2

B3

C

A5

A4

VCC

VCC

B4

B5

D

A7

A6

GND

GND

B6

B7

E

A9

A8

B8

B9

F

A10

A11

B11

B10

G

A12

A13

GND

GND

B13

B12

H

A14

A15

VCC

VCC

B15

B14

J

A16

A17

GND

GND

B17

B16

K

A18

OEBA

LEBA

GND

CLKBA

B18

GQL OR ZQL PACKAGE

(TOP VIEW)

J

H

G

F

E

D

C

B

A

2

13

4

6

5

K