AD1928

Rev. 0 | Page 20 of 32

DLRCLK

DBCLK

8 DAC CHANNELS OF THE SECOND IC IN THE CHAIN

8 DAC CHANNELS OF THE FIRST IC IN THE CHAIN

DSDATA1

(IN)

DAC L1

DAC R1

DAC L2

DAC R2

DAC L1

DAC R1

DAC L2

DAC R2

DSDATA3

(IN)

DAC L3

DAC R3

DAC L4

DAC R4

DAC L3

DAC R3

DAC L4

DAC R4

DSDATA2

(OUT)

DAC L1

DAC R1

DAC L2

DAC R2

DSDATA4

(OUT)

DAC L3

DAC R3

DAC L4

DAC R4

32 BITS

DSP

SECOND

AD1928

FIRST

AD1928

MSB

Figure 19. Dual-Line DAC TDM Mode (Applicable to 96 kHz Sample Rate, 16-Channel, Two-AD1928 Daisy Chain, DSDATA3 and DSDATA4 are the Daisy Chain)

DLRCLK

DBCLK

DSDATA1

DAC L1

DAC R1

DAC L2

DAC R2

DSDATA2

DAC L3

DAC R3

DAC L4

DAC R4

32 BITS

MSB

Figure 20. Dual-Line DAC TDM Mode (Applicable to 192 kHz Sample Rate, 8-Channel Mode)

ALRCLK

ABCLK

ASDATA1 (TDM_IN

OF THE SECOND AD1928

IN THE CHAIN)

UNUSED

UNUSED

ADC L1

ADC R1

2 ADC CHANNELS OF FIRST IC IN THE CHAIN

2 ADC CHANNELS OF SECOND IC IN THE CHAIN

ADCTDMOUT (TDM_OUT

OF THE SECOND AD1928

IN THE CHAIN)

UNUSED

UNUSED

ADC L1

ADC R1

UNUSED

UNUSED

ADC L1

ADC R1

32 BITS

MSB

DSP

SECOND

AD1928

FIRST

AD1928