M68HC08 datasheet(41/124 Pages) FREESCALE

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MC68HC05C9A Advance Information Data Sheet, Rev. 5.1

Freescale Semiconductor

Chapter 7

Input/Output Ports

7.1 Introduction

This section briefly describes the 31 input/output (I/O) lines arranged as one 7-bit and three 8-bit ports.

All of these port pins are programmable as either inputs or outputs under software control of the data

direction registers.

NOTE

To avoid a glitch on the output pins, write data to the I/O port data register

before writing a 1 to the corresponding data direction register.

7.2 Port A

Port A is an 8-bit bidirectional port which does not share any of its pins with other subsystems. The port

A data register is at $0000 and the data direction register (DDR) is at $0004. The contents of the port A

data register are indeterminate at initial power-up and must be initialized by user software. Reset does

not affect the data registers, but clears the data direction registers, thereby returning the ports to inputs.

Writing a 1 to a DDR bit sets the corresponding port bit to output mode. A block diagram of the port logic

is shown in Figure 7-1.

Figure 7-1. Port A I/O Circuit

DATA DIRECTION

LATCHED OUTPUT

DATA BIT

I/O

INPUT

REG.

BIT

INPUT

I/O

OUTPUT

INTERNAL

HC05

CONNECTIONS

M68HC08 Datasheet(PDF) 41 Page - Freescale Semiconductor, Inc