AD5441 datasheet(8/16 Pages) AD

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AD5441

Preliminary Technical Data

Rev. PrA | Page 8 of 16

CODE (Decimal)

–0.5

1024

2048

3072

4096

–0.4

–0.3

–0.2

–0.1

0.2

0.4

0.5

VDD = 5V

VREF = 10V

SUPERIMPOSED: TA = –40°C, +25°C, +85°C

512

1536

2560

3584

0.1

0.3

Figure 12. Linearity Error vs. Digital Code

OP AMP OFFSET VOS (µV)

–1000

1000

2000

–2000

–4

–2

VDD = 5V

VREF = 10V

TA = 25°C

Figure 13. Linearity Error vs. External Op Amp Offset VOS

20mV

VDD = 5V

VREF = 10V

fCLK = 2.5MHz

CODE: 0x7FF TO 0x800

VOUT

(10mV/DIV)

TIME (200ns/DIV)

(5V/DIV)

Figure 14. Midscale Transition Performance

VDD = 5V

VREF = 10V

TA = 25°C

CLK

(5V/DIV)

TIME (1µs/DIV)

VOUT

(5V/DIV)

Figure 15. Large Signal Settling Time

FREQUENCY (Hz)

10M

100k

10k

ALL BITS ON

B10

(MSB) B11

(LSB) B0

108

100

ALL BITS OFF

Figure 16. Reference Multiplying Bandwidth vs. Frequency and Code

|VREF| (V)

–0.50

–0.25

0.50

0.25

VDD = 5V

TA = 25°C

Figure 17. Linearity Error vs. Reference Voltage

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