Preliminary Technical Data

AD5441

Rev. PrA | Page 11 of 16

PARAMETER DEFINITIONS

GENERAL CIRCUIT INFORMATION

The AD5441 is a 12-bit multiplying DAC with a low

temperature coefficient. It contains an R-2R resistor ladder

network, data input and control logic, and two data registers.

The digital circuitry forms an interface in which serial data can

be loaded under microprocessor control into a 12-bit shift

register and then transferred, in parallel, to the 12-bit DAC

register.

The analog portion of the AD5441 contains an inverted R-2R

ladder network consisting of silicon-chrome, highly stable

(50 ppm/°C), thin-film resistors, and 12 pairs of NMOS

current-steering switches, see Figure 20. These switches steer

constant current in each ladder leg, regardless of digital input

code. This constant current results in a constant input resistance

reference voltage or current, ac or dc that is within the limits

stated in the Absolute Maximum Ratings.

10kΩ

S1

20kΩ

S2

20kΩ

10kΩ

S3

20kΩ

10kΩ

S12

20kΩ

20kΩ

*

10kΩ

BIT 1 (MSB)

BIT 2

BIT 3

BIT 12 (LSB)

GND

DIGITAL INPUTS

*THESE SWITCHES PERMANENTLY ON.

NOTES

1. SWITCHES SHOWN FOR DIGITAL INPUTS HIGH.

*

Figure 20. Simplified DAC Circuit

The 12 output current steering NMOS FET switches are in

series with each R-2R resistor.

To further ensure accuracy across the full temperature range,

permanently on MOS switches were included in series with the

feedback resistor and the R-2R ladder’s terminating resistor.

Figure 20 shows the location of the series switches. During any

switches.

OUTPUT IMPEDANCE

The AD5441’s output resistance, as in the case of the output

capacitance, varies with the digital input code. This resistance,

feedback resistor alone when all digital inputs are low, and

7.5 kΩ, the feedback resistor in parallel with approximate 30 kΩ

of the R-2R ladder network resistance when any single bit logic

is high. Static accuracy and dynamic performance will be

affected by these variations.

APPLICATIONS INFORMATION

In most applications, linearity depends upon the potential of

DAC is connected to an external precision op amp inverting

input. The external amplifiers noninverting input should be tied

directly to ground without the usual bias current compensating

resistor (see Figure 21 and Figure 22). The selected amplifier

should have a low input bias current and low drift over

temperature. The amplifiers input offset voltage should be

nulled to less than 200 mV (less than 10% of 1 LSB). All

grounded pins should tie to a single common ground point to

noise level with adequate bypassing. It is best to operate the

AD5441 from the analog power supply and grounds.

UNIPOLAR 2-QUADRANT MULTIPLYING

The most straightforward application of the AD5441 is in the

2-quadrant multiplying configuration shown in Figure 21.

If the reference input signal is replaced with a fixed dc voltage

reference, the DAC output will provide a proportional dc

voltage output according to the transfer equation

where:

D is the decimal data loaded into the DAC register.

GND

CLK

SRI

R1

LD

AD5441

AGND

C1

A1

R2

NOTES

1. R1 AND R2 USED ONLY IF GAIN ADJUSTMENT IS REQUIRED.

2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

μCONTROLLER

Figure 21. Unipolar (2-Quadrant) Operation