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AD9991 Datasheet(PDF) 37 Page - Analog Devices |
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AD9991 Datasheet(HTML) 37 Page - Analog Devices |
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37 / 60 page ![]() AD9991 –37– SERIAL INTERFACE TIMING All of the internal registers of the AD9991 are accessed through a 3-wire serial interface. Each register consists of an 8-bit address and a 24-bit data-word. Both the 8-bit address and 24-bit data- word are written starting with the LSB. To write to each register, a 32-bit operation is required, as shown in Figure 40a. Although many registers are fewer than 24 bits wide, all 24 bits must be written for each register. For example, if the register is only 10 bits wide, the upper 14 bits are don’t cares and may be filled with 0s during the serial write operation. If fewer than 24 bits are writ- ten, the register will not be updated with new data. SDATA A0 A1 A2 A4 A5 A6 A7 D0 D1 D2 D3 D21 D22 D23 SCK SL A3 NOTES 1. SDATA BITS ARE LATCHED ON SCK RISING EDGES. SCK MAY IDLE HIGH OR LOW IN BETWEEN WRITE OPERATIONS. 2. ALL 32 BITS MUST BE WRITTEN: 8 BITS FOR ADDRESS AND 24 BITS FOR DATA. 3. IF THE REGISTER LENGTH IS <24 BITS, “DON’T CARE” BITS MUST BE USED TO COMPLETE THE 24-BIT DATA LENGTH. 4. NEW DATA VALUES ARE UPDATED IN THE SPECIFIED REGISTER LOCATION AT DIFFERENT TIMES, DEPENDING ON THE PARTICULAR REGISTER WRITTEN TO. SEE THE REGISTER UPDATES SECTION FOR MORE INFORMATION. tDH tLS tLH tDS ... ... ... 8-BIT ADDRESS 24-BIT DATA 1 32 234 567 8 9 10 11 12 30 31 Figure 40a. Serial Write Operation SDATA A0 A1 A2 A4 A5 A6 A7 D0 D1 D22 D23 SCK SL A3 NOTES 1. MULTIPLE SEQUENTIAL REGISTERS MAY BE LOADED CONTINUOUSLY. 2. THE FIRST (LOWEST ADDRESS) REGISTER ADDRESS IS WRITTEN, FOLLOWED BY MULTIPLE 24-BIT DATA-WORDS. 3. THE ADDRESS WILL AUTOMATICALLY INCREMENT WITH EACH 24-BIT DATA-WORD (ALL 24 BITS MUST BE WRITTEN). 4. SL IS HELD LOW UNTIL THE LAST DESIRED REGISTER HAS BEEN LOADED. D0 D1 D22 D23 D0 ... ... ... DATA FOR STARTING REGISTER ADDRESS DATA FOR NEXT REGISTER ADDRESS D2 D1 ... ... ... ... ... ... 1 32 234 567 8 9 10 31 34 33 56 55 58 57 59 Figure 40b. Continuous Serial Write Operation Figure 40b shows a more efficient way to write to the registers, using the AD9991’s address auto-increment capability. Using this method, the lowest desired address is written first, followed by multiple 24-bit data-words. Each new 24-bit data-word will automatically be written to the next highest register address. By eliminating the need to write each 8-bit address, faster register loading is achieved. Continuous write operations may be used starting with any register location, and may be used to write to as few as two registers, or as many as the entire register space. REV. 0 |
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