Philips Semiconductors

Product specification

SA1630

IF quadrature transceiver

1998 Jul 21

13

Table 2. Definition of SA1630 Serial Registers

First data word: (shown with default values)

Address SA1630

Sub

Adr

N-Divider

Reference

Divider

Charge-Pump

Test

MSB

LSB

a0

a1

a2

a3

sa

n0

n1

n2

n3

n4

n5

n6

n7

n8

r0

r1

c0

c1

c2

x0

x1

1

1

1

0

0

1

0

1

1

0

0

0

0

0

1

0

1

1

1

0

0

Address:

4 bits, a0...a3, fixed to 1110

Sub:Address:

1 bit, sa, fixed to 0 for first data word

N-Divider:

9 bits, n0...n8, values 64 (00100 0000) to 511 (11111 1111) allowed for IF choice, default 352 (assuming LO

input frequency is 704 MHz).

Reference Divider Register:

2 bits, r0...r1, 00 = /8, 01 = 11, 10 = /22, 11 = /44. Default: 10

Charge-Pump Register:

3 bits, c0...c2, Binary setting factor for charge pumps, values 000 = minimum current to 111 = maximum

current, default is maximum charge pump current (111)

Test Register:

2 bits, x0...x1, default 00, see functional description for details

Second data word: (shown with default values)

Address SA1630

Sub

Adr

LLL Mode

Control

I Offset Register

Q Offset

Register

VGA Gain Control

Misc

Control

bits

MSB

LSB

a0

a1

a2

a3

sa

s0

s1

i0

i1

i2

q0

q1

q2

b0

b1

b2

b3

b4

b5

bc

vc

1

1

1

0

1

0

0

0

0

0

0

0

0

1

1

1

1

1

1

0

1

Address:

4 bits, a0...a3, fixed to 1110

Sub:Address:

1 bit, sa, fixed to 1 for second data word

LLL Mode control:

2 bits, s0, s1 Not used, always set to 0, 0

I Offset Register:

3 bits, i0...i2 .10 Not used, always set to 0, 0, 0

Q Offset Register:

3 bits, q0...q2. q0. Currently not being used, always set to 0, 0, 0

VGA Gain Control

6 bits, b0...b5. 000 000 corresponds to maximum gain and 111 111 to minimum gain in 2 dB increments.

Check control table contained elsewhere in this document.

VGA Control Enable

1 bit, bc. When bc=0 the VGA is controlled by external pins. When bc=1 then bits b0...b5 control the VGA.

Default bc=0, control by external pins

Regulator Disable

1 bit, Vc. When Vc=0 the 2.5V reference output is completely powered down. When Vc=1 the reference

voltage is enabled (provided Tx_ON=HIGH). Default: Vc = 1, enable the 2.5 reference.