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SAA2521 Datasheet(PDF) 21 Page - NXP Semiconductors |
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SAA2521 Datasheet(HTML) 21 Page - NXP Semiconductors |
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21 / 28 page ![]() August 1993 21 Philips Semiconductors Preliminary specification Masking threshold processor for MPEG layer 1 audio compression applications SAA2521 tw2 > 550 ns minimum time between two 8-bit transfers MBC137 LTENA LTCNT0/1 LTCLK LTENA must remain HIGH W2 t Fig.18 16-bit transfers. MBC138 - 2 LTENC LTCLKC LTDATAC bit : t Le t su1 t su4 t h2 t cH t cL t su2 t t su3 h3 01 LTCNT0(C)/1(C) Fig.19 SAA2521 to SAA2520 timing. tle > 400 ns minimum LOW time LTENA prior to transfer ts1 > 400 ns set-up time LTCNT0, 1C before LTENC HIGH ts2 > 200 ns set-up time LTENC before LTCLKC LOW th2 > 400 ns hold time LTENC after LTCLK HIGH tlc > 210 ns minimum LOW time LTCLKC thc > 210 ns minimum HIGH time LTCLKC ts3 > 210 ns set-up time LTDATAC before LTCLKC HIGH th3 > 160 ns hold time LTDATAC after LTCLKC HIGH ts4 > 900 ns set-up time LTCLKC before LTENC HIGH |
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