NXP Semiconductors

A5000

EdgeLock Secure Authenticator

6 Power-saving modes

The device can provide two power-saving operation modes:

1. Power-down mode (with state retention).

By default this mode is globally disabled. It can be enabled in custom part configuration. Please contact

your sales representative about this.

2. Deep Power-down mode (no state retention).

Availability requires VCC pin to be supplied like described in Section 6.2.

6.1 Power-down mode

The Power-down mode has the following properties:

• All internal clocks are frozen

• CPU enters power-saving mode with program execution being stopped

• CPU registers keep their contents

• RAM keeps its contents

Power-down mode is entered via the command; "End of APDU session request" (according to [1]) respectively

"RELEASE request" (according to GP T=1oI2C [4]). In Power-down mode, all internal clocks are frozen. The

IOs hold the logical states they had at the time Power-down mode was activated.

To exit from the Power-down mode an external interrupt edge must be triggered by a falling edge on I2C_SDA2.

6.2 Deep Power-down mode

The Deep Power-down mode enables maximum power saving. This mode is activated by pulling enable PIN

(ENA) to a logic zero level.

While in Deep Power-down mode the internal power and VOUT is switched off completely and only the I2C pads

stay supplied.

To leave the Deep Power-down mode pad ENA has to be pulled up to to a logic „1" level.

For usage of Deep Power-down mode the A5000 must be supplied via pin Vin, and pin VCC needs to be

supplied by pin Vout, as described in [6].

7 Ordering information

12NC

Type number

A5000 Variant

Orderable part number

935426225472

A5000R2HQ1/Z016U

A5000

A5000R2HQ1/Z016UZ

935424319598

OM-A5000ARD

A5000 Arduino Board

OM-A5000ARD

Table 9. Ordering information

2

In case ISO7816 is enabled a reset signal on RST_N exits the Power-down mode. After wake-up from Power-down mode via RST_N

the device is in idle mode (see Table 17)

A5000

All information provided in this document is subject to legal disclaimers.

© 2024 NXP B.V. All rights reserved.

Product data sheet

Rev. 1.5 — 8 July 2024

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