SAA7380GP datasheet(19/60 Pages) PHILIPS

19 / 60 page

1996 Apr 25

Philips Semiconductors

Preliminary speciﬁcation

Error correction and host interface IC for

CD-ROM (ELM)

SAA7380

7.7.16

STAT2

The bits MODE and FORM in this register indicate the mode, form and correction scheme of the current frame.

Table 11 STAT2 register bits

Table 12 MODE and FORM bits

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

RMOD3

RMOD2

RMOD1

RMOD0

MODE

FORM

RFORM1

RFORM2

MODE

FORM

SETTING

Mode 1

Mode 2, Form 1

Mode 2, Form 2 or ECC correction impossible

The Mode bit is always copied from the CTRL1 register.

The Form information is determined by the AUTORQ bit in

the CTRL0 register. When this bit is set to logic 0, the Form

information is copied from the CTRL1 register. When this

bit is set to logic 1 the Form information is copied from the

mode header byte.

If correction of the block was impossible, FORM will be set

to logic 1 regardless of the requested correction. This will

happen under the following circumstances:

• An illegally synchronized block (ILSYNC = 1 or

LBLK = 1)

• A data block specified as Mode 2, Form 2, or detected

as Mode 2, Form 2

• A Mode 2 submode byte error detected during

processing

• A mode mismatch detected by the mode check function

(MCHQRQ = 1)

• A mode byte error detected by the mode check function

(MCHQRQ = 1).

The RFORM2, RFORM1 bits contain a preview of the form

bit for the next frame

Table 13 RFORM2 and RFORM1 bits

The RMOD3, RMOD2, RMOD1 and RMOD0 bits contain

a preview of the next block MODE byte.

RMOD3 = bit7 # bit6 # bit5 # bit4 # bit3 # C2FLAG

RMOD2 = bit2 # C2FLAG

RMOD1 = bit1 # C2FLAG

RMOD0 = bit0 # C2FLAG

RFORM1

RFORM2

MEANING

Form 0

Form 1

error in form byte

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