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Z8F2480 Datasheet(PDF) 39 Page - Zilog, Inc. |
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Z8F2480 Datasheet(HTML) 39 Page - Zilog, Inc. |
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39 / 412 page ![]() PS025017-1222 P R E L I M I N A R Y Pin Description Z8 Encore! XP® F1680 Series Product Specification 14 2.3. Signal Descriptions Table 4 describes the signals for each block on the F1680 Series MCU. To determine the signals available for specific package styles, see the Pin Configurations chapter on page 10. Table 4. Signal Descriptions Signal Mnemonic I/O Description General-Purpose I/O Ports A–E PA[7:0] I/O Port A: These pins are used for general-purpose I/O. PB[5:0] I/O Port B: These pins are used for GPIO. PC[7:0] I/O Port C: These pins are used for GPIO. PD[7:0] I/O Port D: These pins are used for GPIO. PD0 is output only. PE[6:0] I/O Port E: These pins are used for GPIO. LIN-UART Controllers TXD0/TXD1 O Transmit Data 0–1: These signals are the transmit output from the UART0/1 and IrDA0/1. RXD0/RXD1 I Receive Data 0–1: These signals are the receive input for the UART0/1 and IrDA0/1. CTS0/CTS1 I Clear To Send 0–1: These signals are the flow control input for the UART0/1. DE0/DE1 O Driver Enable 0–1: These signals allow automatic control of external RS-485 drivers. These signals are approximately the inverse of the TXE (Transmit Empty) bit in the UART Status 0/1 register. The DE0/1 signal can be used to ensure the external RS-485 driver is enabled when data is transmitted by the UART0/1. I2C Controller SCL I/O I2C Serial Clock: The I2C Master supplies this signal. If the F1680 Series MCU is the I2C Master, this pin is an output. If it is the I2C slave, this pin is an input. When the GPIO pin is configured as an alternate function to enable the SCL function, this pin is open-drain. SDA I/O Serial Data: This open-drain pin transfers data between the I2C and an external I2C Master/Slave. When the GPIO pin is configured as an alternate function to enable the SDA function, this pin is open-drain. ESPI Controller SS I/O Slave Select: This signal can be an output or an input. If the F1680 Series MCU is the SPI master, this pin can be configured as the Slave Select output. If it is the SPI slave, this pin is the input slave select. |
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