Clock pulse high duration

50

ns

Integration time

Tint

0.250

5.0

ms

Operating temperature

Top

25

50

* Tint (Min) is the lowest line integration time available with 5.0 MHz clock rate.

Switching Characteristics (25°C)

The switching characteristics for the I/O clocks are shown in the above timing diagrams.

See timing symbol definitions in the following table.

Item

Symbol

Min.

Typical

Max.

Units

Clock cycle time

to

0.20

4.0

µs

Clock pulse width

tw

50

ns

Clock duty cycle

25

75

%

Prohibit crossing time

of Start Pulse

tprh

15

ns

Data setup time

tds

20

ns

Data hold time

tdh

20

ns

Signal delay time

tdl

50

ns

Signal settling time

tsh

120

ns

Symbol Definitions for the Above Timing Diagram

PAGE 5 OF 6 - PI321MC-A6, 2/16/00

CP

SP

Vout

tds

to

tw

tprh

tdh

tsh

tdl

MODULE TIMING DIAGRAM