Data Sheet

AD5122/AD5142

SPECIFICATIONS

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Rev. D | 9 of 27

Figure 3. SPI Serial Interface Timing Diagram, Clock Polarity (CPOL) = 0, Clock Phase (CPHA) = 1

Figure 4. SPI Serial Interface Timing Diagram, Clock Polarity (CPOL) = 1, Clock Phase (CPHA) = 0

Figure 5. Control Pins Timing Diagram