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TPC5120 Datasheet(PDF) 13 Page - 3PEAK INC.

Part # TPC5120
Description  12-bit 1-MHz SAR ADC
PDF  32 Pages
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Manufacturer  3PEAK [3PEAK INC.]
Direct Link  http://www.3peakic.com/
Logo 3PEAK - 3PEAK INC.

TPC5120 Datasheet(HTML) 13 Page - 3PEAK INC.

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TPC512x
12-bit 1-MHz SAR ADC
The TSSOP packaged devices have four General Purpose IO(GPIO) pins while QFN versions have only one
GPIO. These four pins can be individually programmed as GPO or GPI. It is also possible to use them for pre-
assigned functions. GPO data can be written into the device through the SDI line. The device refreshes the
GPO data on the CSN falling edge as per the SDI data written in the previous frame.
Similarly, the device latches the GPI status on the CSN falling edge and outputs the GPI data on the SDO line
in the same frame starting with the CSN falling edge.
The device has two (high and low) programmable alarm thresholds per channel. If the input crosses these limits,
the device flags out an alarm on GPIO0/GPIO1 depending on the GPIO program register setting. The alarm is
asserted (under the alarm conditions) on the 12th SCLK falling edge in the same frame when data conversion
is in progress. The alarm outputs are reset on the 10th falling edge of SCLK in the next frame.
The device offers a power-down feature to save power when not in use. There are two ways to power down the
device. It can be powered down by writing DI05 = 1 in the mode control register; in this case the device powers
down on the 16th falling edge of SCLK in the next frame. The device will power up again with DI05 = 0 in the
mode control register.
E.g. if the user configures mode control register DI05 = 1 in the [N-2]th frame. The register writes in on the 16th
SCLK rising edge in the [N-2]th frame. ADC works properly in the [N-1]th frame. The device powers down ADC
on the 16th SCLK falling edge in the [N-1] th frame. The device goes into power-down mode in the [N]th frame.
And if the user configures mode control register DI05 = 0 in the [N 1]th frame. The register writes in on the 16th
SCLK rising edge in the [N 1] th frame, and the device powers on in the [N 1]th frame. After 1 frame analog
settling time, the ADC works properly in the [N 2]th frame.
Another way to power down the device is through GPIO in the case of the TSSOP packaged devices. GPIO3
can act as the PDN input. This is an asynchronous and active low input. The device powers down
instantaneously after GPIO3(PDN) = 0.
Functional block diagram
Figure 8 Functional Block Diagram



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