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LTC6907 Datasheet(PDF) 17 Page - Analog Devices |
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LTC6907 Datasheet(HTML) 17 Page - Analog Devices |
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17 / 24 page ![]() LTC6991 17 Rev. D For more information www.analog.com Digital Frequency Control The control voltage can be generated by a DAC (digital- to-analog converter), resulting in a digitally-controlled frequency. Many DACs allow for the use of an external reference. If such a DAC is used to provide the VCTRL voltage, the VSET dependency can be eliminated by buffer- ing VSET and using it as the DAC’s reference voltage, as shown in Figure 15. The DAC’s output voltage now tracks any VSET variation and eliminates it as an error source. The SET pin cannot be tied directly to the reference input of the DAC because the current drawn by the DAC’s REF input would affect the frequency. ISET Extremes (Master Oscillator Frequency Extremes) When operating with ISET outside of the recommended 1.25µA to 20µA range, the master oscillator operates outside of the 62.5kHz to 1MHz range in which it is most accurate. The oscillator can still function with reduced accuracy for ISET < 1.25µA. At approximately 500nA, the oscillator output will be frozen in its current state. The output could halt in a high or low state. This avoids introducing short pulses when frequency modulating a very low frequency output. APPLICATIONS INFORMATION – + 6991 F15 LTC6991 RST GND SET OUT V+ DIV C1 0.1µF R1 R2 RSET V+ RVCO V+ 0.1µF 1/2 LTC6078 LTC1659 V+ VCC REF GND VOUT µP DIN CLK CS/LD 1MHz • 50k 1024 • NDIV • RVCO fOUT = DIN = 0 TO 4095 • 1 + – RVCO RSET DIN 4096 ( ) 0.1µF Figure 15. Digitally-Controlled Oscillator At the other extreme, it is not recommended to operate the master oscillator beyond 2MHz because the accuracy of the DIV pin ADC will suffer. Frequency Modulation and Settling Time The LTC6991 will respond to changes in ISET up to a –3dB bandwidth of 0.4 • fOUT. Following a 2× or 0.5× step change in ISET, the output frequency takes less than one cycle to settle to within 1% of the final value. Power Supply Current The power supply current varies with frequency, supply voltage and output loading. It can be estimated under any condition using the following equation. This equation ignores CLOAD (valid for CLOAD < 1nF) and assumes the output has 50% duty cycle. IS(TYP) ≈ V+ • fMASTER • 7.8pF + V+ 420kΩ + V+ 2 • RLOAD + 1.8 • ISET + 50µA |
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