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TDA4841 Datasheet(PDF) 31 Page - NXP Semiconductors |
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TDA4841 Datasheet(HTML) 31 Page - NXP Semiconductors |
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31 / 60 page  1999 Oct 25 31 Philips Semiconductors Product specification I2C-bus autosync deflection controller for PC monitors TDA4841PS Pulse diagrams Fig.14 Pulse diagram for vertical part. handbook, full pagewidth internal trigger inhibit window (typical 4 ms) 1.4 V 3.8 V automatic trigger level vertical sync pulse 4.0 V differential output currents VOUT1 (pin 13) and VOUT2 (pin 12) inhibited vertical oscillator sawtooth at VCAP (pin 24) vertical blanking pulse at CLBL (pin 16) vertical blanking pulse at HUNLOCK (pin 17) synchronized trigger level EW drive waveform at EWDRV (pin 11) DC shift 3.6 V maximum 7.0 V maximum low-level 1.2 V fixed IVOUT1 IVOUT2 MGM075 |
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