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TDA5155 Datasheet(PDF) 13 Page - NXP Semiconductors |
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TDA5155 Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 24 page ![]() 1997 Apr 08 13 Philips Semiconductors Preliminary specification Pre-amplifier for Hard Disk Drive (HDD) with MR-read/inductive write heads TDA5155 Notes 1. Unused bits in the registers (indicated by X) are don’t care. Default data, initialized at Power-up, is zero in all registers. For VCC <2.5 V, the register contents are not guaranteed. 2. Vth programming uses both the test mode register and the compensation capacitor register. d0 in the formula above is the LSB of the test mode register and d2 is the d2 data bit of the compensation capacitor register. 0X X X 0011 MR current DAC register: mA 0X X X 0100 write current DAC register: mA 0X X X 0101 servo write register: (d0,d1) = (0,0): one head (d0,d1) = (1,1): all heads (d0,d1) = (1,0): odd numbered heads (H1, H3, H5, H7 and H9) (d0,d1) = (0,1): even numbered heads (H0, H2, H4, H6 and H8) 0X X X 0110 test mode register: (d2,d1,d0) = (0,0,0) = not in test mode (d2,d1,d0) = (0,0,1) = read head test (IMR1 =IMR2) (d2,d1,d0) = (0,1,0) = read head test (IMR2 = 5 mA fixed) (d2,d1,d0) = (0,1,1) = temperature monitor (d2,d1,d0) = (1,X,d0) = thermal asperity detection, see note 2 Vth = (210 + 560.d0 + 280.d2) µV 0X X X 0111 compensation capacitor register: equivalent differential capacitance = (4.d2 + 2.d1 + 1.d0) × 2pF 0X X X 1000 high frequency gain attenuator register nominal pole frequency = 0X X X 1001 high frequency gain boost register nominal zero frequency = 0X X X 1010 settle time register settle time: 1X X X 1111 device ID register ID = 8.d3 + 4.d2 + 2.d1 + 1.d0; d3 to d0 are preset to (0,0,1,1) 1 XXXa3 a2 a1 a0 when a7 = 1, data from the register with address a3 to a0 is read out on SDATA ADDRESS REGISTERS(1) FUNCTION A7 A6 A5 A4 A3 A2 A1 A0 I MR 0.5 10k Ω R ext --------------- 10 16.d4 8.d3 4.d2 2.d1 d0 + ++++ () × = I WR 10k Ω R ext --------------- 20 16.d4 8.d3 4.d2 2.d1 d0 + ++++ () = 800 MHz 8.d3 4.d2 2.d1 1.d0 +++ --------------------------------------------------------------------- 800 MHz 8.d3 4.d2 2.d1 1.d0 +++ --------------------------------------------------------------------- t st 2 µs 1 4.d2 2.d1 1.d0 1 +++ () ------------------------------------------------------------------- µs + = |
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