TDA5155 datasheet(21/24 Pages) PHILIPS

21 / 24 page

1997 Apr 08

Philips Semiconductors

Preliminary speciﬁcation

Pre-ampliﬁer for Hard Disk Drive (HDD)

with MR-read/inductive write heads

TDA5155

Notes to the characteristics

1. The differential voltage gain depends on the MR

resistance. It can be improved by programming the

d4 bit in the configuration register.

2. The gain boost implements a pole-zero combination:

The +3 dB gain boost corner frequency is

. The

−3 dB gain

attenuation corner frequency is

, where d3, d2, d1 and d0

are to be programmed via the serial interface. In

practical use, the bandwidth is limited by the

inductance of the connection between the MR heads

and the pre-amplifier.

3. Noise calculation

a) Definitions: The amplifier has a low input

resistance. No lead resistance is taken into

account. The input referred noise voltage,

excluding the noise of the MR resistors, is defined

as:

where Gv is the voltage gain, Vno is the noise

voltage at the output of the amplifier, k is the

Boltzmann constant and T is the temperature in K.

The noise figure is defined as follows:

in 1 Hz

bandwidth. Note that RMR includes all resistances

between Rx or Ry to ground.

b) Noise figure versus IMR and RMR: Table 1 shows

the variation of the noise figure with IMR and RMR.

c) Input referred noise voltage: The input referred

noise voltage calculation can be significantly

different (from 1.0 to 0.44 nV/

√Hz for instance) by

taking an equivalent signal-to-noise ratio into

account when using two MR stripes (28

Ω for each

stripe) or one MR stripe (42

Ω). It assumes that the

signal coming from the head is larger for a

dual-stripe head than for a single-stripe head (50%

extra signal for a dual-stripe head).

4. The channel separation is defined by the ratio of the

gain response of the amplifier using the selected head

H(n) to the gain response of the amplifier using the

adjacent head H(n

±1), head H(n) being selected.

800 MHz

8.d3

4.d2

2.d1

1.d0

+++

---------------------------------------------------------------------

800 MHz

8.d3

4.d2

2.d1

1.d0

+++

---------------------------------------------------------------------

irn

()

---------

4kT

MR1

MR2

()

–

F10

---------

4kT

MR1

MR2

()

------------------------------------------------------------







log

The PSRR (in dB) is defined as input referred ratio:

, where Gv is the differential input

to differential output gain, and Gp is the power supply

to differential output gain.The CMRR (in dB) is defined

as input referred ratio:

, where

Gv is the differential input to differential output gain and

Gcm is the common mode input to differential output

gain. Flex and board lay-out may affect these

parameters significantly.

6. This refers to the crosstalk from SCLK and SDATA

inputs via the read inputs to RDx and RDy. Two cases

can be distinguished:

a) When SEN is LOW, SCLK and SDATA are

prohibited reaching the device and crosstalk is low.

b) Programming via the serial interface is done with

SEN HIGH. Then crosstalk can occur. A careful

design of the board or flex-foil is required to avoid

crosstalk via this path.

7. The rise and fall times depend on the

write amplifier/write head combination. Lh and Rh

represent the components on the evaluation board.

Parasitic capacitances also limit the performance.

8. The write current rise/fall time asymmetry is defined by

9. Write-to-read recovery time includes the write mode to

read mode switching using the R/W pin on the same

head (see Fig.5). The AC signal reaches its full

amplitude few tens of ns after appearing at the reader

RDx and RDy outputs.

10. In read mode, the head switching, standby to read

active switching and changing MR current include fast

current settling (see Fig.5). The AC signal reaches its

full amplitude few tenth of ns after appearing at the

reader RDx and RDy outputs.

11. Write settling time includes the read mode to write

mode switching using the R/W pin.

12. The typical supply current in read mode depends on

the bias current for the MR element.

13. The typical supply current in write mode also depends

on the write current.

PSRR

log

-------

CMRR

log

-----------

–

()

-----------------------

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