SNx4HCT240 Octal Buffers and Line Drivers With 3-State Outputs

1 Features

• Operating voltage range of 4.5V to 5.5V

• High-current outputs drive up to 15 LSTTL loads

• Low power consumption, 80μA max ICC

• Typical tpd = 12 ns

• ±6mA output drive at 5V

• Low input current of 1μA max

• Inputs are TTL-voltage compatible

• 3-state outputs drive bus lines or buffer memory

address registers

2 Description

These octal buffers and line drivers are designed

specifically to improve both the performance and

density of 3-state memory address drivers, clock

drivers, and bus-oriented receivers and transmitters.

The ’HCT240 devices are organized as two 4-bit

buffers/drivers with separate output-enable (OE)

inputs. When OE is low, the device passes inverted

data from the A inputs to the Y outputs. When OE is

high, the outputs are in the high-impedance state.

Device Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

BODY SIZE(3)

SN74HCT240

DGS (VSSOP, 20)

5.1mm × 4.9mm

5.1mm × 3mm

DW (SOIC, 20)

12.80mm x 10.3mm

12.80mm x 7.50mm

PDIP (20)

24.33mm × 9.4mm

24.33mm × 6.35mm

NS (SOP, 20)

12.6mm x 7.8mm

12.6mm x 5.3mm

PW (TSSOP, 20)

6.50mm x 6.4mm

6.50mm x 4.40mm

SN54HCT240

J (CDIP, 20)

24.2mm x 7.62mm

24.2 mm x 6.92mm

FK (LCCC, 20)

8.9mm x 8.9mm

8.9mm x 8.9mm

(1)

For more information, see Mechanical, Packaging, and

Orderable Information.

(2)

The package size (length × width) is a nominal value and

includes pins, where applicable.

(3)

The body size (length × width) is a nominal value and does

not include pins.

Functional Block Diagram

SN54HCT240, SN74HCT240

SCLS174H – MARCH 1984 – REVISED AUGUST 2024

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.