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M68HC08 Datasheet(PDF) 26 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 288 page ![]() General Description Data Sheet MC68HC908BD48 — Rev. 2.1 26 General Description Freescale Semiconductor • Low-power design; fully static with stop and wait modes • 5V operating voltage • 6MHz internal bus frequency; with 24MHz external crystal • 48,128 bytes of on-chip FLASH memory • 1,024 bytes of on-chip random access memory (RAM) • Sync signal processor with the following features: – Horizontal and vertical frequency counters – Low vertical frequency indicator (40.7Hz) – Polarity controlled Hsync and Vsync outputs from separate sync or composite sync inputs – Internal generated free-running Hsync and Vsync pulses – CLAMP pulse output to the external pre-amp chip • 6-channel, 8-bit analog-to-digital converter (ADC) • 16-channel, 8-bit pulse width modulator (PWM) • Full universal serial bus (USB) specification 1.0 compliant low- speed bus with 3 endpoints: – 1 Control endpoint (two 8-byte buffer) – 2 Interrupt endpoints (one 8-byte buffer shared) • On-chip 3.3V regulator for USB pull-up resistor • DDC12AB1 module with the following: – DDC1 hardware – Multi-master IIC2 hardware for DDC2AB; with dual address • Additional multi-master IIC module • 16-bit, 2-channel timer interface modules (TIM) with selectable input capture, output compare, and PWM capability on one channel • 32 general purpose input/output (I/O) pins, including: – 4 open-drain pins 1. DDC is a VESA bus standard. 2. IIC is a proprietary Philips interface bus. |
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