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M68HC08 Datasheet(PDF) 81 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 81 Page - Freescale Semiconductor, Inc |
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81 / 288 page  Central Processor Unit (CPU) MC68HC908BD48 — Rev. 2.1 Data Sheet Freescale Semiconductor Central Processor Unit (CPU) 81 LSR opr LSRA LSRX LSR opr,X LSR ,X LSR opr,SP Logical Shift Right –– 0 DIR INH INH IX1 IX SP1 34 44 54 64 74 9E64 dd ff ff 4 1 1 4 3 5 MOV opr,opr MOV opr,X+ MOV #opr,opr MOV X+,opr Move (M)Destination ← (M)Source H:X ← (H:X) + 1 (IX+D, DIX+) 0–– – DD DIX+ IMD IX+D 4E 5E 6E 7E dd dd dd ii dd dd 5 4 4 4 MUL Unsigned multiply X:A ← (X) × (A) –0– ––0 INH 42 5 NEG opr NEGA NEGX NEG opr,X NEG ,X NEG opr,SP Negate (Two’s Complement) M ← –(M) = $00 – (M) A ← –(A) = $00 – (A) X ← –(X) = $00 – (X) M ← –(M) = $00 – (M) M ← –(M) = $00 – (M) –– DIR INH INH IX1 IX SP1 30 40 50 60 70 9E60 dd ff ff 4 1 1 4 3 5 NOP No Operation None – – – – – – INH 9D 1 NSA Nibble Swap A A ← (A[3:0]:A[7:4]) – – – – – – INH 62 3 ORA #opr ORA opr ORA opr ORA opr,X ORA opr,X ORA ,X ORA opr,SP ORA opr,SP Inclusive OR A and M A ← (A) | (M) 0 – – – IMM DIR EXT IX2 IX1 IX SP1 SP2 AA BA CA DA EA FA 9EEA 9EDA ii dd hh ll ee ff ff ff ee ff 2 3 4 4 3 2 4 5 PSHA Push A onto Stack Push (A); SP ← (SP) – 1 ––– ––– INH 87 2 PSHH Push H onto Stack Push (H); SP ← (SP) – 1 ––– ––– INH 8B 2 PSHX Push X onto Stack Push (X); SP ← (SP) – 1 ––– ––– INH 89 2 PULA Pull A from Stack SP ← (SP + 1); Pull (A) ––– ––– INH 86 2 PULH Pull H from Stack SP ← (SP + 1); Pull (H) ––– ––– INH 8A 2 PULX Pull X from Stack SP ← (SP + 1); Pull (X) ––– ––– INH 88 2 ROL opr ROLA ROLX ROL opr,X ROL ,X ROL opr,SP Rotate Left through Carry –– DIR INH INH IX1 IX SP1 39 49 59 69 79 9E69 dd ff ff 4 1 1 4 3 5 Table 6-1. Instruction Set Summary (Continued) Source Form Operation Description Effect on CCR VH I N Z C b0 b7 C 0 C b0 b7 |
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