3803 datasheet(15/119 Pages) RENESAS

15 / 119 page

Rev.1.00

Apr 2, 2007

Page 15 of 117

REJ03B0212-0100

3803 Group (Spec.L)

Fig 12. Memory map of special function register (SFR)

000016

000116

000216

000316

000416

000516

000616

000716

000816

000916

000A16

000B16

000C16

000D16

000E16

000F16

001016

001116

001216

001316

001416

001516

001616

001716

001816

001916

001A16

001B16

001C16

001D16

001E16

001F16

002016

002116

002216

002316

002416

002516

002616

002716

002816

002916

002A16

002B16

002C16

002D16

002E16

002F16

003016

003116

003216

003316

003416

003516

003616

003716

003816

003916

003A16

003B16

003C16

003D16

003E16

003F16

Port P0 (P0)

Port P0 direction register (P0D)

Port P1 (P1)

Port P1 direction register (P1D)

Port P2 (P2)

Port P2 direction register (P2D)

Port P3 (P3)

Port P3 direction register (P3D)

Port P4 (P4)

Port P4 direction register (P4D)

Port P5 (P5)

Port P5 direction register (P5D)

Port P6 (P6)

Port P6 direction register (P6D)

Timer 12, X count source selection register (T12XCSS)

Timer Y, Z count source selection register (TYZCSS)

MISRG

Reserved (Note 1)

Transmit/Receive buffer register 1 (TB1/RB1)

Serial I/O1 status register (SIO1STS)

Serial I/O1 control register (SIO1CON)

UART1 control register (UART1CON)

Baud rate generator (BRG1)

Serial I/O2 control register (SIO2CON)

Watchdog timer control register (WDTCON)

Serial I/O2 register (SIO2)

Prescaler 12 (PRE12)

Timer 1 (T1)

Timer 2 (T2)

Timer XY mode register (TM)

Prescaler X (PREX)

Timer X (TX)

Prescaler Y (PREY)

Timer Y (TY)

Timer Z low-order (TZL)

Timer Z high-order (TZH)

Timer Z mode register (TZM)

PWM control register (PWMCON)

PWM prescaler (PREPWM)

PWM register (PWM)

Baud rate generator 3 (BRG3)

Transmit/Receive buffer register 3 (TB3/RB3)

Serial I/O3 status register (SIO3STS)

Serial I/O3 control register (SIO3CON)

UART3 control register (UART3CON)

AD/DA control register (ADCON)

AD conversion register 1 (AD1)

DA1 conversion register (DA1)

DA2 conversion register (DA2)

AD conversion register 2 (AD2)

Interrupt source selection register (INTSEL)

Interrupt edge selection register (INTEDGE)

CPU mode register (CPUM)

Interrupt request register 1 (IREQ1)

Interrupt request register 2 (IREQ2)

Interrupt control register 1 (ICON1)

Interrupt control register 2 (ICON2)

Notes1: Do not write any data to these addresses, because these are

reserved area.

2: Do not access to the SFR area including nothing.

0FE016

0FE116

0FE216

0FE316

0FE416

0FE516

0FE616

0FE716

0FE816

0FE916

0FEA16

0FEB16

0FEC16

0FED16

0FEE16

0FEF16

0FF016

0FF116

0FF216

0FF316

0FF416

0FF516

0FF616

Flash memory control register 0 (FMCR0)

Flash memory control register 1 (FMCR1)

Flash memory control register 2 (FMCR2)

Reserved (Note 1)

Port P0 pull-up control register (PULL0)

Port P1 pull-up control register (PULL1)

Port P2 pull-up control register (PULL2)

Port P3 pull-up control register (PULL3)

Port P4 pull-up control register (PULL4)

Port P5 pull-up control register (PULL5)

Port P6 pull-up control register (PULL6)

3803 Datasheet(PDF) 15 Page - Renesas Technology Corp

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