REV.

AD818

–13–

A HIGH SPEED, 3-OP AMP IN AMP

The circuit of Figure 11 uses three high speed op amps: two

AD818s and an AD817. This high speed circuit lends itself well

to CCD imaging and other video speed applications. It has the

optional flexibility of both dc and ac trims for common-mode

rejection, plus the ability to adjust for minimum settling time.

+VIN

RG

2pF

5pF

A1

AD818

–VIN

VOUT

2pF–8pF

SETTLING

TIME AC

CMR ADJUST

RL

2k

970

50

DC CMR

ADJUST

3pF

+15V

COMMON

–15V

10 F

10 F

+VS

–VS

0.1 F

0.1 F

1 F

1 F

PIN 7

EACH

AMPLIFIER

0.1 F

0.1 F

PIN 4

EACH

AMPLIFIER

EACH AMPLIFIER

BANDWIDTH, SETTLING TIME, AND TOTAL HARMONIC DISTORTION VS. GAIN

GAIN

RG

CADJ

(pF)

SMALL

SIGNAL

BANDWIDTH

SETTLING

TIME

TO 0.1%

THD + NOISE

BELOW INPUT LEVEL

@ 10kHz

3

10

100

1k

222

20

2–8

2–8

2–8

14.7MHz

4.5MHz

960kHz

200ns

370ns

2.5 s

82dB

81dB

71dB

1k

5pF

1k

1k

1k

1k

A2

AD818

A3

AD818

Figure 11. High Speed 3-Op Amp In Amp

DIFFERENTIAL LINE RECEIVER

The differential receiver circuit of Figure 9 is useful for many

applications—from audio to video. It allows extraction of a low

level signal in the presence of common-mode noise, as shown in

Figure 10.

VOUT

2pF

DIFFERENTIAL

INPUT

+5V

–5V

OUTPUT

AD818

0.01 F

2.2 F

0.01 F

2.2 F

2pF

1k

1k

1k

1k

VB

VA

Figure 9. Differential Line Receiver

10

90

100

0%

1V

2V

20ns

OUTPUT

VA

Figure 10. Performance of Line Receiver, RL = 150 W,

G = +2

D