C8051F062 datasheet(87/328 Pages) SILABS

87 / 328 page

C8051F060/1/2/3/4/5/6/7

Rev. 1.2

10-Bit ADC (ADC2, C8051F060/1/2/3)

The ADC2 subsystem for the C8051F060/1/2/3 consists of an analog multiplexer (referred to as AMUX2),

and a 200 ksps, 10-bit successive-approximation-register ADC with integrated track-and-hold and pro-

grammable window detector (see block diagram in Figure 7.1). The AMUX2, data conversion modes, and

window detector can all be configured from within software via the Special Function Registers shown in

Figure 7.1. ADC2 operates in both Single-ended and Differential modes, and may be configured to mea-

sure any of the pins on Port 1, or the Temperature Sensor output. The ADC2 subsystem is enabled only

when the AD2EN bit in the ADC2 Control register (ADC2CN) is set to logic 1. The ADC2 subsystem is in

low power shutdown when this bit is logic 0.

10-Bit

SAR

ADC

TEMP

SENSOR

9-to-1

AMUX

(SE or

DIFF)

AV+

AD2EN

AIN2.0

AIN2.1

AIN2.2

AIN2.3

AIN2.4

AIN2.5

AIN2.6

AIN2.7

Start Conversion

AGND

ADC2LTL

ADC2LTH

ADC2GTL

ADC2GTH

Timer 3 Overflow

Timer 2 Overflow

AD2BUSY (W)

CNVSTR2

AD2WINT

Comb.

Logic

AMX2SL

AMX2CF

ADC2CF

ADC2CN

Figure 7.1. ADC2 Functional Block Diagram

C8051F062 Datasheet(PDF) 87 Page - Silicon Laboratories

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