5

TUSB8020B

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SLLSEF6C – JULY 2014 – REVISED JUNE 2017

Product Folder Links: TUSB8020B

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Copyright © 2014–2017, Texas Instruments Incorporated

Pin Functions (continued)

PIN

TYPE

DESCRIPTION

NAME

NO.

I

2C/SMBUS SIGNALS

SCL/SMBCLK

2

I/O

PD

I

2C clock/SMBus clock. Function of terminal depends on the setting of the SMBUSz input.

When SMBUSz = 1, this terminal acts as the serial clock interface for an I

2C EEPROM.

When SMBUSz = 0, this terminal acts as the serial clock interface for an SMBus host.

This pin must be pulled up to use the OTP ROM.

Can be left unconnected if external interface not implemented.

SDA/SMBDAT

3

I/O

PD

I

2C data/SMBus data. Function of terminal depends on the setting of the SMBUSz input.

When SMBUSz = 1, this terminal acts as the serial data interface for an I

2C EEPROM.

When SMBUSz = 0, this terminal acts as the serial data interface for an SMBus host.

This pin must be pulled up to use the OTP ROM.

Can be left unconnected if external interface not implemented.

TEST AND MISCELLANEOUS SIGNALS

SMBUSz/SS_DN2

22

I

PU

SMBUS mode / SuperSpeed USB Status for downstream port 2

The value of the terminal is sampled at the deassertion of reset to enable I

2C or SMBus mode.

0 = SMBus mode selected

1 = I

2C mode selected

After reset, this signal indicates the SuperSpeed USB connection status of downstream port 2. A value of 1 indicates the

connection is SuperSpeed USB.

PWRCTL_POL/SS_DN1

21

I/O

PD

Power control polarity / SuperSpeed USB status for downstream port 1.

The value of the terminal is sampled at the deassertion of reset to set the polarity of PWRCTL[2:1].

0 = PWRCTL polarity is active high.

1 = PWRCTL polarity is active low.

After reset, this signal indicates the SuperSpeed USB connection status of downstream port 1. A value of 1 indicates the

connection is SuperSpeed USB.

GANGED/SMBA2/

HS_UP

35

I

PU

Ganged operation enable/SMBus address bit 2/ high-speed status for upstream port

The value of the terminal is sampled at the deassertion of reset to set the power switch and over current detection mode as

follows:

0 = Individual power control supported when power switching is enabled.

1 = Power control gangs supported when power switching is enabled.

When SMBus mode is enabled using SMBUSz, this terminal sets the value of the SMBus slave address bit 2. SMBus slave

address bits 2 and 3 are always 1 for the TUSB8020B.

After reset, this signal indicates the high-speed USB connection status of the upstream port. A value of 1 indicates the upstream

port is connected to a high-speed USB capable port.

FULLPWRMGMTz/

SMBA1/SS_UP

36

I, PU

Full power management enable/ SMBus Address bit 1/ Super-Speed USB status for upstream port

The value of the terminal is sampled at the deassertion of reset to set the power switch control follows:

0 = Power switching supported

1 = Power switching not supported

Full power management is the ability to control power to the downstream ports of the TUSB8020B using

PWRCTL[2:1]/BATEN[2:1].

When SMBus mode is enabled using SMBUSz, this terminal sets the value of the SMBus slave address bit 1. SMBus slave

address bit 3 is always 1 for the TUSB8020B.

Can be left unconnected if full power management and SMBus are not implemented.

After reset, this signal indicates the SuperSpeed USB connection status of the upstream port. A value of 1 indicates the

upstream port is connected to a SuperSpeed USB capable port.

TEST

10

I

PD

TEST mode enable. When this terminal is asserted high at reset enables test mode. This terminal is reserved for factory use. It

is recommended to pull-down this terminal to ground.

POWER AND GROUND SIGNALS

VDD

1, 12, 18, 30,

34, 45

PWR

1.1-V power rail

VDD33

7, 13, 23, 25,

33, 37, 40, 48

PWR

3.3-V power rail

GND

PAD

—

Ground