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TUSB8020BPHPR Datasheet(PDF) 10 Page - Texas Instruments |
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TUSB8020BPHPR Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 44 page ![]() 10 TUSB8020B SLLSEF6C – JULY 2014 – REVISED JUNE 2017 www.ti.com Product Folder Links: TUSB8020B Submit Documentation Feedback Copyright © 2014–2017, Texas Instruments Incorporated Feature Description (continued) The battery charging mode for each port depends on the state of Reg_6h(batEn[n]), the status of the VBUS input, and the state of REG_Ah(autoModeEnz) upstream port, as identified in Table 1. Battery charging can also be enabled through the PWRCTL1/BATEN1 and PWRCTL2/BATEN2 pins. (1) Auto-mode automatically selects divider-mode or DCP mode. (2) Divider mode can be configured for high-current mode through register or OTP settings. (3) USB device is USB Battery Charging Specification Revision 1.2 Compliant (4) USB device is Chinese Telecommunications Industry Standard YD/T 1591-2009 Table 1. TUSB8020B Battery Charging Modes batEn[n] VBUS autoModeEnz BC Mode Port x (x = n + 1) 0 Don’t care Don’t care Don’t care 1 <4 V 0 Automode(1) (2) 1 DCP(3) (4) >4 V 1 CDP(3) 8.3.2 USB Power Management The TUSB8020B can be configured for power switched applications using either per-port or ganged power- enable controls and over-current status inputs. Power switch support is enabled by REG_5h(fullPwrMgmtz) and the per-port or ganged mode is configured by REG_5h(ganged). It can also be enabled through the FULLPWRMGMTz pin. Also ganged or individual control can be controlled by the GANGED pin. The TUSB8020B supports both active-high and active-low power-enable controls. The PWRCTL[2:1] polarity is configured by REG_Ah(pwrctlPol). The polarity can also be configured by the PWRCTL_POL pin. 8.3.3 One-Time Programmable (OTP) Configuration The TUSB8020B allows device configuration through OTP non-volatile memory (OTP). The programming of the OTP is supported using vendor-defined USB device requests. For details using the OTP features, contact your TI representative. Table 2 provides a list features which may be configured using the OTP. The bit field section in Table 2 shows which features can be controlled by OTP ROM. The bits not listed in the table are not accessible by the OTP ROM. Table 2. OTP Configurable Features CONFIGURATION REGISTER OFFSET BIT FIELD DESCRIPTION REG_01h [7:0] Vendor ID LSB REG_02h [7:0] Vendor ID MSB REG_03h [7:0] Product ID LSB REG_04h [7:0] Product ID MSB REG_07h [0] Port removable configuration for downstream ports 1. OTP configuration is inverse of rmbl[1:0], that is: 1 = Not removable 0 = Removable REG_07h [1] Port removable configuration for downstream ports 2. OTP configuration is inverse of rmbl[1:0], that is: 1 = Not removable 0 = Removable REG_0Ah [1] Automode enable REG_0Ah [4] High-current divider mode enable. REG_F2h [3:1] USB power switch power-on delay. |
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