TUSB8020BPHPR datasheet(19/44 Pages) TI

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TUSB8020B

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SLLSEF6C – JULY 2014 – REVISED JUNE 2017

Product Folder Links: TUSB8020B

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8.5.1.11 Device Configuration Register 2 (offset = Ah)

Figure 13. Register Offset Ah

LEGEND: R/W = Read/Write; R = Read only; –n = value after reset

Table 14. Bit Descriptions – Device Configuration Register 2

Bit

Field Name

Access

Reset

Description

RSVD

Reserved. Read only, returns 0 when read.

customBCfeatures

Custom Battery Charging Feature Enable. This bit controls the ability to write to the

battery charging feature configuration controls.

0 = The HiCurAcpModeEn and AutoModeEnz bits are read only and the values

are loaded from the OTP ROM.

1 = The HiCurAcpModeEn and AutoModeEnz bits are read/write and can be

loaded by EEPROM or written by SMBus. from this register.

This bit may be written simultaneously with HiCurAcpModeEn and AutoModeEnz.

pwrctlPol

Power enable polarity. This bit is loaded at the deassertion of reset with the inverse

value of the PWRCTL_POL terminal.

0 = PWRCTL polarity is active low

1 = PWRCTL polarity is active high

When the TUSB8020B is in I2C mode, the TUSB8020B loads this bit from the contents

of the EEPROM.

When the TUSB8020B is in SMBUS mode, the value may be overwritten by an SMBus

host.

HiCurAcpModeEn

RO/RW

High-current ACP mode enable. This bit enables the high-current tablet charging mode

when the automatic battery charging mode is enabled for downstream ports.

0 = High current divider mode disabled

1 = High current divider mode enabled

This bit is read only unless the customBCfeatures bit is set to 1. Otherwise the value of

this bit reflects the value of the OTP ROM HiCurAcpModeEn bit.

RSVD

Reserved

dsportEcrEn

DSPort ECR enable. This bit enables full implementation of the DSPORT ECR (April

2013).

0 = DSPort ECR (April 2013) is enabled with the exception of changes related

to the CCS bit is set upon entering U0, and changes related to avoiding or

reporting compliance mode entry.

1 = The full DSport ECR (April 2013) is enabled.

autoModeEnz

RO/RW

Automatic Mode Enable. This bit is loaded from the OTP ROM.

The automatic mode only applies to downstream ports with battery charging enabled

when the upstream port is not connected. Under these conditions:

0 = Automatic mode battery charging features are enabled. Only battery

charging DCP and custom BC (divider mode) is enabled.

1 = Automatic mode is disabled; only battery charging DCP and CDP mode is

supported.

Note: When the upstream port is connected, battery charging CDP mode is supported

on all ports when this field is one.

This bit is read only unless the customBCfeatures bit is set to 1. Otherwise the value of

this bit reflects the value of the OTP ROM AutoModeEnz bit.

RSVD

Reserved. Read only, returns 0 when read.

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