AD795 datasheet(13/20 Pages) AD

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Data Sheet

AD795

Rev. D | Page 13 of 20

Leakage through the bulk of the circuit board can still occur

with the guarding schemes shown in Figure 34 and Figure 35.

Standard G10 type PCB material may not have high enough

volume resistivity to hold leakages at the sub-picoampere level

particularly under high humidity conditions. One option that

eliminates all effects of board resistance is shown in Figure 36.

The AD795’s sensitive input pin (either Pin 2 when connected

as an inverter, or Pin 3 when connected as a follower) is bent up

and soldered directly to a Teflon® insulated standoff. Both the

signal input and feedback component leads must also be

insulated from the circuit board by Teflon standoffs or low

leakage shielded cable.

AD795

INPUT SIGNAL

LED

BOARD

INPUT PIN:

PIN 2 FOR INVERTER

OR PIN 3 FOR FOLLOWER.

TEFLON INSULATED STANDOFF

Figure 36. Input Pin to Insulating Standoff

Contaminants such as solder flux on the board’s surface and on

the amplifier’s package can greatly reduce the insulation resistance

between the input pin and those traces with supply or signal

voltages. Both the package and the board must be kept clean

and dry. An effective cleaning procedure is to first swab the

surface with high grade isopropyl alcohol, then rinse it with

deionized water and, finally, bake it at 100°C for 1 hour. Poly-

propylene and polystyrene capacitors should not be subjected to

the 100°C bake because they can be damaged at temperatures

greater than 80°C.

Other guidelines include making the circuit layout as compact

as possible and reducing the length of input lines. Keeping

circuit board components rigid and minimizing vibration

reduce triboelectric and piezoelectric effects. All precision high

impedance circuitry requires shielding from electrical noise and

interference. For example, a ground plane should be used under

all high value (that is, greater than 1 MΩ) feedback resistors. In

some cases, a shield placed over the resistors, or even the entire

amplifier, may be needed to minimize electrical interference

originating from other circuits. Referring to the equation in

Figure 33, this coupling can take place in either, or both, of two

different forms via time varying fields:

or by injection of parasitic currents by changes in capacitance

due to mechanical vibration:

dCp

Both proper shielding and rigid mechanical mounting of

components help minimize error currents from both of these

sources.

OFFSET NULLING

The circuit in Figure 37 can be used when the amplifier is used

as an inverter. This method introduces a small voltage in series

with the amplifier’s positive input terminal. The amplifier’s input

offset voltage drift with temperature is not affected. However,

variation of the power supply voltages causes offset shifts.

AD795

–

VOUT

+VS

–VS

499kΩ

0.1µF

200Ω

100kΩ

Figure 37. Alternate Offset Null Circuit for Inverter

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