UMA1002 datasheet(8/36 Pages) PHILIPS

8 / 36 page

1997 Jan 28

Philips Semiconductors

Product speciﬁcation

Data processor for cellular radio

(DPROC2)

UMA1002

PROGRAMMING OF ESCC BITS

There is a possibility to program the expected ESCC bits,

so that DPROC2 can compare expected and received

SAT and signal any inconsistency to the system controller

via BUSY/VSAT pin. Consequently there is no need to

read the measured SAT periodically via the I2C-bus.

BCH ERROR FILTER

If this feature is enabled, DPROC2 will not pass on to the

microcontroller words with BCH errors. Consequently the

microcontroller can remain in power-saving mode. This

feature in combination with the control filler feature is

defined in Table 8.

SELECTABLE CLOCK DIVIDER (ONLY IN LQFP32)

An on-chip selectable divide-by-8 clock divider reduces

external peripheral component count.

Power-up state and master reset (RESET)

RESET should be HIGH as soon as power supply is

available.

DPROC2 will not respond reliably to any inputs (including

RESET) until 100

µs after the power supply has settled

within the specified tolerance. The analog sections of the

device will have stabilized within 5 ms. No on-chip

power-on reset is provided, therefore before the device

can enter normal operation RESET must be held HIGH.

RESET is an active HIGH master reset input, with a

minimum active pulse width of 4

µs which may be used to

reset the total logic within DPROC2 to a predefined state

as illustrated in Tables 1 and 2. It is preferably only used

during power-up, during normal operation it is

recommended to use the fully synchronous reset signals

derived from the I2C-bus bits FVC, STS and TXRST

(see Table 4). To ensure correct operation TXCLK must

be held HIGH during RESET operation.

Table 1

Predeﬁned state of the digital output pins

Table 2

Predeﬁned state of the I2C-bus registers

OUTPUT

STATE

RXLINE

HIGH

TXCTRL

high-impedance (HIGH)

TACTRL

high-impedance (HIGH)

RACTRL

high-impedance (HIGH)

BUSY/VSAT

HIGH

TXLINE

HIGH (by 100 k

Ω internal pull-up resistor)

RECDATA

LOW

MVO

HIGH

SDA

high-impedance (HIGH)

BIT

76543210

Status (read)

LOW

HIGH

LOW

HIGH

Control 1 (write)

LOW

Control 2 (write)

LOW

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