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ICS9FG104 Datasheet(PDF) 12 Page - Integrated Device Technology |
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ICS9FG104 Datasheet(HTML) 12 Page - Integrated Device Technology |
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12 / 17 page ![]() IDTTM/ICSTM Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA ICS9FG104 REV K 04/12/07 ICS9FG104 Frequency Generator for CPU, QPI, FBD, PCIe Gen 2 & SATA 12 Electrical Characteristics - REF-14.318/25 MHz TA = 0 - 70°C; VDD = 3.3 V +/-5%; CL = 30 pF (unless otherwise specified) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes Long Accuracy ppm see Tperiod min-max values -300 0 300 ppm 1 14.318MHz output nominal 69.8270 69.8413 69.8550 ns 1 25.000MHz output nominal 39.9880 40.0000 40.0120 ns 1 Output High Voltage VOH IOH = -1 mA 2.4 V 1 Output Low Voltage VOL IOL = 1 mA 0.4 V 1 Output High Current IOH VOH @MIN = 1.0 V, VOH@MAX = 3.135 V -29 -23 mA 1 Output Low Current IOL VOL @MIN = 1.95 V, VOL @MAX = 0.4 V 29 27 mA 1 Rise Time tr1 VOL = 0.4 V, VOH = 2.4 V 1 1.6 2 ns 1 Fall Time tf1 VOH = 2.4 V, VOL = 0.4 V 1 1.6 2 ns 1,2 Duty Cycle dt1 VT = 1.5 V 45 52.5 55 % 1,2 Jitter tjcyc-cyc VT = 1.5 V 150 200 ps 1 1Guaranteed by design and characterization, not 100% tested in production. 2 All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz or 25 MHz Clock period Tperiod Electrical Characteristics - Phase Jitter (Applies to: Revision D Devices, Revision ID = 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes PCIe Gen 1 specs (1.5 - 22 MHz) 40 108 ps 1,2 FBD specs (11-33 MHz) 3ps rms 1 PCIe Gen 2 specs (5-16 MHz, 8-16 MHz) 2.23 3.1 ps rms 1 Notes on Phase Jitter: 2 Specification applies to revision C devices and later. 1 Applicable to all DIF outputs. See http://www.pcisig.com for complete specs. Guaranteed by design and characterization, not tested in production. Jitter, Phase t jphasePLL |
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