RT1060 datasheet(12/119 Pages) NXP

12 / 119 page

i.MX RT1060 Crossover Processors for Consumer Products, Rev. 4, 04/2024

NXP Semiconductors

Architectural Overview

The following subsections provide an architectural overview of the i.MX RT1060 processor system.

2.1

Block diagram

Figure 2 shows the functional modules in the i.MX RT1060 processor system1.

Figure 2. i.MX RT1060 system block diagram

1. Some modules shown in this block diagram are not offered on all derivatives. See Table 1 for details.

aaa-055232

eMMC 4.5/SD 3.0 x2

Connectivity

UART x8

ADC x2 (20-channel)

ADC

ACMP x4

8 x 8 Keypad

I2C x4

SPI x4

GPIO

I2S/SAI x3

S/PDIF Tx/Rx

FlexCAN x2

USB 2.0 OTG with PHY x2

FLEXIO1/FLEXIO2

10/100 ENET

with IEEE 1588 x1

Secure JTAG

System control

Arm Cortex-M7

Up to 512 kB TCM

32 kB I-cache

32 kB D-cache

High-speed GPIO

GPIO 6/7/8/9

FLEXIO3

FPU

MPU

NVIC

CPU platform

8/16/24-bit Parallel CSI

24-bit Parallel LCD

PXP

2D graphics acceleration

resize, CSC, overlay, rotation

Multimedia

FlexSPI x2 (dual-channel QuadSPI

NAND and NOR, Octal Flash, and RAM)

External memory

PLL/OSC

512 kB OCRAM

Internal memory

Ciphers and RNG

Secure RTC

eFuse

Security

128 kB ROM

DCDC

Power management

LDO

Temp monitor

RTC and Reset

Enhanced DMA

IOMUX

GP Timer x2

Quadrature ENC x4

QuadTimer

(4-Channel) x4

FlexPWM

(4-Channel) x4

Watch Dog x4

External Memory Controller

8-bit/16-bit SDRAM

Parallel NOR FLASH

NAND FLASH

PSRAM

HAB

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