TUSB1064 datasheet(4/52 Pages) TI

4 / 52 page

Table 4-1. Pin Functions (continued)

TYPE(1)

DESCRIPTION

NAME

NO.

TX2p

Diff I/O

Differential positive input for DisplayPort or differential positive output for USB3

upstream Facing port.

TX2n

Diff I/O

Differential negative input for DisplayPort or differential negative output for USB3

upstream Facing port.

SSTXp

Diff I

Differential positive input for USB3 downstream facing port.

SSTXn

Diff I

Differential negative input for USB3 downstream facing port.

SSRXp

Diff O

Differential positive output for USB3 downstream facing port.

SSRXn

Diff O

Differential negative output for USB3 downstream facing port.

EQ1

4 Level I

This pin along with EQ0 sets the USB receiver equalizer gain for upstream facing RX1

and RX2 when USB used. Up to 11dB of EQ available.

EQ0

4 Level I

This pin along with EQ1 sets the USB receiver equalizer gain for upstream facing RX1

and RX2 when USB used. Up to 11dB of EQ available.

2 Level I

(PD)

Device Enable. For normal operation pull up this pin to 3.3V through a 10k to 50kΩ

resistor.

HPDIN

2 Level I

Hot Plug Detect. This pin is an input for Hot Plug Detect received from DisplayPort sink.

When HPDIN is Low for greater than 2ms, all DisplayPort lanes are disabled while the

AUX to SBU switch remains closed.

I2C_EN

4 Level I

I2C Programming Mode or GPIO Programming Select. I2C is only disabled when this

pin is "0".

0 = GPIO mode (I2C disabled)

R = TI Test Mode (I2C enabled at 3.3V)

F = I2C enabled at 1.8 V

1 = I2C enabled at 3.3V.

SBU1

I/O, CMOS

SBU1. DC couple this pin to the SBU1 pin on the Type-C receptacle. A 2MΩ resistor to

GND is also recommended.

SBU2

I/O, CMOS

SBU2. DC couple this pin to the SBU2 pin on the Type-C receptacle. A 2MΩ resistor to

GND is also recommended.

AUXp

I/O, CMOS

AUXp. DisplayPort AUX positive I/O connected to the DisplayPort sink through a AC-

coupling capacitor. In addition to AC-coupling capacitor, this pin also requires a 1M

resistor to DP_PWR (3.3V). This pin along with AUXN is used by the TUSB1064-Q1 for

AUX snooping and is routed to SBU1/2 based on the orientation of the Type-C.

AUXn

I/O, CMOS

AUXn. DisplayPort AUX negative I/O connected to the DisplayPort sink through a

AC-coupling capacitor. In addition to AC-coupling capacitor, this pin also requires a

1M resistor to GND. This pin along with AUXP is used by the TUSB1064-Q1 for AUX

snooping and is routed to SBU1/2 based on the orientation of the Type-C.

DPEQ1

4 Level I

DisplayPort Receiver EQ. The DPEQ1 and DPEQ0 pins select the DisplayPort receiver

equalization gain.

DPEQ0/A1

4 Level I

DisplayPort Receiver EQ. The DPEQ0 and DPEQ1 pins select the DisplayPort receiver

equalization gain. When I2C_EN ≠ "0", the DPEQ0 pin also sets the TUSB1064-Q1 I2C

address.

SSEQ1

4 Level I

The SSEQ1 and SSEQ0 pins set the USB receiver equalizer gain for downstream

facing SSTXP/N.

SSEQ0/A0

4 Level I

The SSEQ0 and SSEQ1 pins set the USB receiver equalizer gain for downstream

facing SSTXP/N. When I2C_EN ≠ "0", the SSEQ0 pin also sets the TUSB1064-Q1 I2C

address. If I2C_EN = "F", then the SSEQ0 pin must be set to "F" or "0".

FLIP/SCL

2 Level I

(Failsafe)

(PD)

When I2C_EN = "0" this pin is Flip control, otherwise this pin is I2C clock. When used

for the I2C clock, pull up to the VCC I2C supply on the I2C controller through an external

resistor.

CTL0/SDA

2 Level I

(Failsafe)

(PD)

When I2C_EN = "0" this pin is USB3 switch control, otherwise this pin is I2C data.

When used for I2C data, pull up to the VCC I2C supply on the I2C controller through an

external resistor.

TUSB1064-Q1

SLLSFP0 – SEPTEMBER 2024

www.ti.com

Submit Document Feedback

Product Folder Links: TUSB1064-Q1

TUSB1064 Datasheet(PDF) 4 Page - Texas Instruments

TUSB1064 Datasheet(HTML) 4 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

Datasheet Download

Link URL