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TUSB1064 Datasheet(PDF) 23 Page - Texas Instruments

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Part # TUSB1064
Description  TUSB1064-Q1 USB Type-C® DP Alt Mode 10Gbps Sink-Side Linear Redriver Crosspoint Switch
PDF  52 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TUSB1064 Datasheet(HTML) 23 Page - Texas Instruments

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7.4.4 Linear EQ Configuration
Each of the TUSB1064-Q1 receiver lanes has individual controls for receiver equalization. The receiver
equalization gain value can be controlled either through I2C registers or through GPIOs. Table 7-7 details the
gain value for each available combination when TUSB1064-Q1 is in GPIO mode. These same options are also
available in I2C mode by updating registers DP0EQ_SEL, DP1EQ_SEL, DP2EQ_SEL, DP3EQ_SEL, EQ1_SEL,
EQ2_SEL, and SSEQ_SEL. Each of the 4-bit EQ configuration registers is mapped to the configuration pins as
follows: x_SEL = {x1[1:0],x0[1:0]} where xn[1:0] are the EQ configuration pins with pin levels mapped to 2-bit
values as: 0 = 00, R = 01, F = 10, 1 = 11.
Table 7-7. TUSB1064-Q1 Receiver Equalization GPIO Control
EQUALIZATION
SETTING #
USB3.2 UPSTREAM FACING PORTS
USB 3.2 DOWNSTREAM FACING PORT
ALL DISPLAYPORT LANES
EQ1 PIN LEVEL
EQ0 PIN LEVEL
EQ GAIN AT
5GHz (dB)
SSEQ1 PIN
LEVEL
SSEQ0 PIN
LEVEL
EQ GAIN AT
5GHz (dB)
DPEQ1 PIN
LEVEL
DPEQ0 PIN
LEVEL
EQ GAIN AT
4.05GHz (dB)
0
0
0
0.4
0
0
-2.4
0
0
1.0
1
0
R
2.6
0
R
-0.2
0
R
3.0
2
0
F
4.2
0
F
1.3
0
F
4.4
3
0
1
5.7
0
1
2.8
0
1
5.8
4
R
0
6.7
R
0
3.8
R
0
6.8
5
R
R
7.9
R
R
4.9
R
R
8.0
6
R
F
8.7
R
F
5.8
R
F
8.8
7
R
1
9.5
R
1
6.6
R
1
9.6
8
F
0
10.2
F
0
7.3
F
0
10.4
9
F
R
10.9
F
R
7.9
F
R
11.0
10
F
F
11.4
F
F
8.4
F
F
11.6
11
F
1
11.9
F
1
8.9
F
1
12.1
12
1
0
12.2
1
0
9.3
1
0
12.5
13
1
R
12.6
1
R
9.7
1
R
13.0
14
1
F
12.9
1
F
10.0
1
F
13.4
15
1
1
13.3
1
1
10.5
1
1
13.7
7.4.5 USB3 Modes
The TUSB1064-Q1 monitors the physical layer conditions like receiver termination, electrical idle, LFPS, and
SuperSpeed signaling rate to determine the state of the USB3.1 interface. Depending on the state of the USB
3.2 interface, the TUSB1064-Q1 can be in one of four primary modes of operation when USB 3.2 is enabled
(CTL0 = H or CTLSEL0 = 1b1): Disconnect, U2/U3, U1, and U0.
The Disconnect mode is the state in which TUSB1064-Q1 has not detected far-end termination on upstream
facing port (UFP) or downstream facing port (DFP). The disconnect mode is the lowest power mode of each of
the four modes. The TUSB1064-Q1 remains in this mode until far-end receiver termination has been detected on
both UFP and DFP. The TUSB1064-Q1 immediately exits this mode and enters U0 after far-end termination is
detected.
When in U0 mode, the TUSB1064-Q1 redrives all traffic received on UFP and DFP. U0 is the highest power
mode of all USB3.1 modes. The TUSB1064-Q1 remains in U0 mode until electrical idle occurs on both UFP and
DFP. Upon detecting electrical idle, the TUSB1064-Q1 immediately transitions to U1.
The U1 mode is the intermediate mode between U0 mode and U2/U3 mode. In U1 mode, the TUSB1064-Q1
UFP and DFP receiver termination remains enabled. The UFP and DFP transmitter DC common mode is
maintained. The power consumption in U1 is similar to power consumption of U0.
Next to the disconnect mode, the U2/U3 mode is next lowest power state. While in this mode, the TUSB1064-
Q1 periodically performs far-end receiver detection. Anytime the far-end receiver termination is not detected
on either UFP or DFP, the TUSB1064-Q1 leaves the U2/U3 mode and transitions to the Disconnect mode.
The device also monitors for a valid LFPS. Upon detection of a valid LFPS, the TUSB1064-Q1 immediately
transitions to the U0 mode. In U2/U3 mode, the TUSB1064-Q1 receiver terminations remain enabled but the TX
DC common mode voltage is not maintained.
www.ti.com
TUSB1064-Q1
SLLSFP0 – SEPTEMBER 2024
Copyright © 2024 Texas Instruments Incorporated
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Product Folder Links: TUSB1064-Q1



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