TUSB1064 datasheet(19/52 Pages) TI

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7.3 Feature Description

7.3.1 USB 3.2

The TUSB1064-Q1 supports USB 3.2 datarates up to 10Gbps. The TUSB1064-Q1 supports all the USB defined

power states (U0, U1, U2, and U3). The TUSB1064-Q1 is a linear redriver, therefore the device cannot decode

USB3.2 physical layer traffic. The TUSB1064-Q1 monitors the actual physical layer conditions like receiver

termination, electrical idle, LFPS, and SuperSpeed signaling rate to determine the USB power state of the USB

3.2 interface.

The TUSB1064-Q1 features an intelligent low-frequency periodic signaling (LFPS) detector. The LFPS detector

automatically senses the low-frequency signals and disables receiver equalization functionality. When not

receiving LFPS, the TUSB1064-Q1 enables receiver equalization based on the EQ[1:0] and SSEQ[1:0] pins

or values programmed into EQ1_SEL, EQ2_SEL, and SSEQ_SEL registers.

7.3.2 DisplayPort

The TUSB1064-Q1 supports up to four DisplayPort lanes at datarates up to 8.1Gbps (HBR3). When

configured in DisplayPort mode, the TUSB1064-Q1 monitors the native AUX traffic as the device traverses

between DisplayPort source and DisplayPort sink. For the purposes of reducing power, the TUSB1064-Q1

manages the number of active DisplayPort lanes based on the content of the AUX transactions. The

TUSB1064-Q1 snoops native AUX writes to DPCD registers 0x00101 (LANE_COUNT_SET) and 0x00600

(SET_POWER_STATE) of the DisplayPort sink. The TUSB1064-Q1 disables or enables lanes based on value

written to LANE_COUNT_SET. The TUSB1064-Q1 disables all lanes when SET_POWER_STATE is in the D3.

Otherwise, active lanes are based on value of LANE_COUNT_SET.

DisplayPort AUX snooping is enabled by default but can be disabled by changing the AUX_SNOOP_DISABLE

various configuration registers.

Note

AUX snooping feature is only supported when TUSB1064-Q1 is configured for I2C mode. When

TUSB1064-Q1 is configured for GPIO mode, the AUX snoop feature is disabled and all four DP lanes

are enabled if HPDIN is asserted high.

When the TUSB1064-Q1 AUX snoop feature is enabled, the syncs defined by the DisplayPort

standard must be received for AUX snoop feature to function properly. AUX writes to the

DPCD address 0x00600 and 0x00101 of the panel can result in SET_POWER_STATE and

LANE_COUNT_SET fields at TUSB1064-Q1 offset 0x12 to get set to the appropriate value. If these

fields do not get set correctly, then incoming AUX may not be compliant. If this is the case, then it is

best to disable AUX snoop by setting the AUX_SNOOP_DISABLE field at offset 0x13.

7.3.3 4-Level Inputs

The TUSB1064-Q1 has (I2C_EN, EQ[1:0], DPEQ[1:0], and SSEQ[1:0]) 4-level inputs pins that are used to

control the equalization gain and place TUSB1064-Q1 into different modes of operation. These 4-level inputs

use a resistor divider to help set the four valid levels and provide a wider range of control settings. There is

an internal 35kΩ pullup and a 95kΩ pulldown. These resistors, together with the external resistor connection

combine to achieve the desired voltage level.

Table 7-1. 4-Level Control Pin Settings

LEVEL

SETTINGS

Tie 1kΩ 5% to GND

Tie 20kΩ 5% to GND

Float (leave pin open)

Tie 1kΩ 5% to VCC

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TUSB1064-Q1

SLLSFP0 – SEPTEMBER 2024

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