TUSB1064 datasheet(10/52 Pages) TI

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5.5 Electrical Characteristics (continued)

over operating free-air temperature and voltage range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RON

Output ON resistance

VCC = 3.3V; VIN = 0V to 0.4V for AUXP;

VIN = 2.7V to 3.6V for AUXN

RON-

MISMATCH

ΔON resistance mismatch within pair

VCC = 3.3V; VIN = 0V to 0.4V for AUXP;

VIN= 2.7V to 3.6V for AUXN

1.5

RON_FLAT

ON resistance flatness (RONmax–RON

min) measured at identical VCC and

temperature

VCC = 3.3V; VIN = 0V to 0.4V for AUXP;

VIN = 2.7V to 3.6V for AUXN

VAUXP_DC

_CM

AUX channel DC common-mode voltage

for AUXP and SBU2.

VCC = 3.3V

0.4

VAUXN_D

C_CM

AUX channel DC common-mode voltage

for AUXN and SBU1

VCC = 3.3V

2.7

3.6

CAUX_ON ON-state capacitance

VCC = 3.3V; CTL1 = 1; VIN = 0V or 3.3V

CAUX_OFF OFF-state capacitance

VCC = 3.3V; CTL1 = 0; VIN = 0V or 3.3V

5.6 Timing Requirements

MIN

NOM

MAX

UNIT

USB3

tIDLEEntry,

Delay from U0 to electrical idle

tIDLEExit_U1 U1 exit time: break in electrical idle to the transmission of LFPS

tIDLEExit_U2U

U2/U3 exit time: break in electrical idle to transmission of LFPS

µs

tRXDET_INTV

RX detect interval while in disconnect

tIDLEExit_DIS

Disconnect exit time

µs

tExit_SHTDN Shutdown exit time (CTL0 = VCC/2 to U2/U3)

tDIFF_DLY

Differential propagation delay (20% to 80% of differential voltage measured

1.7 inch from the output pin)

300

tPWRUPACTI

Time when Vcc reaches 70% to device active

tR, tF

Output rise/fall time

tRF-MM

Output rise/fall time mismatch (20% to 80% of differential voltage measured

1.7 inch from the output pin)

5.7 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

AUXp/n and SBU1/2

TAUX_PD Switch propagation delay

CTL1 = H

1400

TAUX_SW_

OFF

Switching on time

CTL1 = H to L

7500

TAUX_SW_

Switching off time

CTL1 = L to H

3000

TAUX_INT

Intra-pair output skew

CTL1 = H

400

USB and DisplayPort mode transition requirement (GPIO mode)

TUSB1064-Q1

SLLSFP0 – SEPTEMBER 2024

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TUSB1064 Datasheet(PDF) 10 Page - Texas Instruments

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