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PM7366-PI Datasheet(PDF) 202 Page - PMC-Sierra, Inc

Part # PM7366-PI
Description  FRAME ENGINE AND DATA LINK MANAGER
PDF  286 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7366-PI Datasheet(HTML) 202 Page - PMC-Sierra, Inc

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RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
189
Register 0x400 : TCAS Indirect Link and Time-slot Select
Bit
Type
Function
Default
Bit 31 to
Bit 16
Unused
XXXXH
Bit 15
R
BUSY
X
Bit 14
R/W
RWB
0
Bit 13
Unused
X
Bit 12
R/W
Reserved[1]
0
Bit 11
R/W
Reserved[0]
0
Bit 10
R/W
LINK[2]
0
Bit 9
R/W
LINK[1]
0
Bit 8
R/W
LINK[0]
0
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
Unused
X
Bit 4
R/W
TSLOT[4]
0
Bit 3
R/W
TSLOT[3]
0
Bit 2
R/W
TSLOT[2]
0
Bit 1
R/W
TSLOT[1]
0
Bit 0
R/W
TSLOT[0]
0
This register provides the link number and time-slot number used to access the transmit channel
provision RAM. Writing to this register triggers an indirect register access and transfers the
contents of the Indirect Channel Data register to an internal holding register.
Note
This register is not byte addressable. Writing to this register modifies all the bits in the register.
Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all
four byte enables are negated, no access is made to this register.
TSLOT[4:0]:
The indirect time-slot number bits (TSLOT[4:0]) indicate the time-slot to be configured or
interrogated in the indirect access. For a channelised T1 link, time-slots 1 to 24 are valid. For



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