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YSS952 Datasheet(PDF) 68 Page - YAMAHA CORPORATION |
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YSS952 Datasheet(HTML) 68 Page - YAMAHA CORPORATION |
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68 / 116 page ![]() 3 FUNCTION DESCRIPTION YSS952 6SS952A30 68 3.5.4.2.5 Updating PEQ Coefficients RAM Updating Coefficients When SDSP is Not Running. The coefficients RAM for PEQ Band0–9 (0x8000–0x8045) can be directly updated. Simply write new coefficients in these locations. Updating Coefficients When DSP is Running. The flow chart below shows the procedure: [Note 1] See "3.2.3.1.4 On-Chip RAM Access". [Note 2] See "3.5.4.2.4 PEQ Coefficients Buffered Transfer Parameters/Transfer Execution". Band 0: PEQAD [6:0] = 0x00 Band 1: PEQAD [6:0] = 0x05 Band 2: PEQAD [6:0] = 0x0A Band 3: PEQAD [6:0] = 0x0F Band 4: PEQAD [6:0] = 0x14 Band 5: PEQAD [6:0] = 0x19 Band 6: PEQAD [6:0] = 0x1E Band 7: PEQAD [6:0] = 0x28 Band 8: PEQAD [6:0] = 0x32 Band 9: PEQAD [6:0] = 0x3C Start All coefficients transferred? Sequentially write new coefficients for one band in the following order, to the area starting from the top address (0x8046) of the PEQ coefficient transfer buffer. [Note 1] a0[23:0], a1[23:0], a2[23:0], b1[23:0], b2[23:0] Transfer Parameters / Transfer Execution Writes 0 (COEFNUM) and PEQAD[6:0] to the On-Chip RAM address 0x8050. [Note 2] End Bands 0–5 coefficient change? NO YES Sequentially write coefficients to be updated for one band in the following order, to the area starting from the top address (0x8046) of the PEQ coefficient transfer buffer. [Note 1] a0[47:24], a1[47:24], a2[47:24], b1[47:24], b2[47:24], a0[23:0], a1[23:0], a2[23:0], b1[23:0], b2[23:0] Transfer Parameters / Transfer Execution Writes 1 (COEFNUM) and PEQAD[6:0] to the On-Chip RAM address 0x8050. [Note 2] NO (Bands 6–9 coefficient change) YES |
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