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TMS29F040 Datasheet(PDF) 15 Page - Texas Instruments |
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TMS29F040 Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 37 page ![]() TMS29F040 524288 BY 8-BIT FLASH MEMORY SMJS820C – APRIL 1996 – REVISED JUNE 1998 15 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 timing requirements controlled by W (see Figure 4, Figure 7, Figure 9, Figure 11, Figure 13, Figure 15, and Figure 17) ALTERNATE ’29F040-60 ’29F040-70 ’29F040-90 UNIT ALTERNATE SYMBOL MIN TYP MAX MIN TYP MAX MIN TYP MAX UNIT tAVAV Cycle time, write tc(W) 60 70 90 ns tWHWH1 Cycle time, programming operation tc(W)PR 18 18 18 µs tWHWH2 Cycle time, sector-erase operation 1 30 1 30 1 30 s tWHWH3 Cycle time, chip-erase operation 8 120 8 120 8 120 s tWLAX Hold time, address th(A) 40 45 45 ns tWHDX Hold time, data valid after W high th(D) 0 0 0 ns tWHEH Hold time, E th(E) 0 0 0 ns tWHWL Pulse duration, W high tw(WH) 20 20 20 ns tWLWH1 Pulse duration, W low tw(WL) 30 35 45 ns tWLWH2 Pulse duration, W low (see Note 8) 100 100 100 µs tWLWH3 Pulse duration, W low (see Note 9) 10 10 10 ms tGHWL Recovery time, read before write trec(R) 0 0 0 ns tAVWL Setup time, address tsu(A) 0 0 0 ns tDVWH Setup time, data tsu(D) 30 30 45 ns tAVGH Setup time, A0 and A6 low and A1 high to G high (see Note 8) 0 0 0 ns tAVGEH Setup time, A0 low and A1 high to G and E high (see Note 9) 0 0 0 ns tELWL Setup time, E tsu(E) 0 0 0 ns tGHWH Setup time, G 0 0 0 ns tVCEL Setup time, VCC 50 50 50 µs tEHVWL Setup time, E VID to W (see Note 9) 4 4 4 µs tGHVWL Setup time, G VID to W (see Notes 8 and 9) 4 4 4 µs tHVT Transition time, VID (see Notes 8 and 9) 4 4 4 µs NOTES: 8. Sector-protect timing (see Figure 15) 9. Sector-unprotect timing (see Figure 17) |
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