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TMS29F040 Datasheet(PDF) 17 Page - Texas Instruments

Part # TMS29F040
Description  524288 BY 8-BIT FLASH MEMORY
PDF  37 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TMS29F040 Datasheet(HTML) 17 Page - Texas Instruments

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TMS29F040
524288 BY 8-BIT
FLASH MEMORY
SMJS820C – APRIL 1996 – REVISED JUNE 1998
17
POST OFFICE BOX 1443
• HOUSTON, TEXAS 77251–1443
timing requirements controlled by E (see Figure 5)
ALTERNATE
’29F040-60
’29F040-70
’29F040-90
UNIT
ALTERNATE
SYMBOL
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
tAVAV
Cycle time, write
tc(W)
60
70
90
ns
tEHEH1
Cycle time, programming operation
18
18
18
µs
tEHEH2
Cycle time, sector-erase operation
(see Note 10)
1
30
1
30
1
30
s
tEHEH3
Cycle time, chip-erase operation
(see Note 11)
8
120
8
120
8
120
s
tEHDX
Hold time, data
th(D)
0
0
0
ns
tEHWH
Hold time, W
th(W)
0
0
0
ns
tELAX
Hold time, address
th(A)
40
45
45
ns
tELEH
Pulse duration, E low
tw(EL)
30
35
45
ns
tEHEL
Pulse duration, E high
tw(EH)
20
20
20
ns
tGHEL
Recovery time, read before write
trec(R)
0
0
0
ns
tAVEL
Setup time, address
tsu(A)
0
0
0
ns
tDVEH
Setup time, data
tsu(D)
30
30
45
ns
tWLEL
Setup time, W
tsu(W)
0
0
0
ns
ALTERNATE
’29F040-10
’29F040-12
UNIT
ALTERNATE
SYMBOL
MIN
TYP
MAX
MIN
TYP
MAX
UNIT
tAVAV
Cycle time, write
tc(W)
100
120
ns
tEHEH1
Cycle time, programming operation
18
18
µs
tEHEH2
Cycle time, sector-erase operation (see Note 10)
1
30
1
30
s
tEHEH3
Cycle time, chip-erase operation (see Note 11)
8
120
8
120
s
tEHDX
Hold time, data
th(D)
0
0
ns
tEHWH
Hold time, W
th(W)
0
0
ns
tELAX
Hold time, address
th(A)
45
50
ns
tELEH
Pulse duration, E low
tw(EL)
45
50
ns
tEHEL
Pulse duration, E high
tw(EH)
20
20
ns
tGHEL
Recovery time, read before write
trec(R)
0
0
ns
tAVEL
Setup time, address
tsu(A)
0
0
ns
tDVEH
Setup time, data
tsu(D)
45
50
ns
tWLEL
Setup time, W
tsu(W)
0
0
ns
NOTES: 10. Timing diagram of E-controlled sector-erase operation not enclosed.
11. Timing diagram of E-controlled chip-erase operation not enclosed.



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