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F49L004BA Datasheet(PDF) 2 Page - Elite Semiconductor Memory Technology Inc. |
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F49L004BA Datasheet(HTML) 2 Page - Elite Semiconductor Memory Technology Inc. |
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2 / 46 page ![]() EFST preliminary F49L004UA / F49L004BA Elite Flash Storage Technology Inc. Publication Date : Aug. 2003 Revision: 0.2 2/46 4. PIN CONFIGURATIONS 4.1 40-pin TSOP I 4.2 32-pin PLCC 4.3 Pin Description Symbol Pin Name Functions A0~A18 Address Input To provide memory addresses. DQ0~DQ7 Data Input/Output To output data when Read and receive data when Write. The outputs are in tri-state when OE or CE is high. CE Chip Enable To activate the device when CE is low. OE Output Enable To gate the data output buffers. WE Write Enable To control the Write operations. RESET Reset Hardware Reset Pin/Sector Protect Unprotect (for 40-TSOP) RY/ BY Ready/Busy To check device operation status(for 40 TSOP) V CC Power Supply To provide power GND Ground 5 6 7 8 9 10 11 12 13 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 29 28 27 26 25 24 23 22 21 A14 A13 A8 A9 A11 OE A10 CE DQ7 32 31 30 14 15 16 17 18 19 20 4 3 2 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A16 A15 A14 A13 A12 A11 A9 A8 WE RESET NC RY/BY A18 A7 A6 A5 A4 A3 A2 A1 A17 VSS NC NC A10 DQ 7 DQ 6 DQ 5 DQ 4 VCC VCC NC DQ 3 DQ 2 DQ 1 DQ 0 OE VSS CE A0 |
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