F49L004BA datasheet(9/46 Pages) ESMT

9 / 46 page

EFST

preliminary

F49L004UA / F49L004BA

Elite Flash Storage Technology Inc.

Publication Date : Aug. 2003

Revision: 0.2

9/46

Output Disable Mode

With the OE is at a logic high level (VIH), outputs from

the devices are disabled. This will cause the output pins

in a high impedance state

Standby Mode

When CE and

ESET

are both held at VCC ± 0.3V,

the device enter CMOS Standby mode. If CE and

ESET

are held at VIH, but not within the range of VCC

± 0.3V, the device will still be in the standby mode, but

the standby current will be larger.

If the device is deselected during auto algorithm of

erasure or programming, the device draws active

current ICC2 until the operation is completed. ICC3 in the

DC Characteristics table represents the standby current

specification.

The device requires standard access time (tCE) for read

access from either of these standby modes, before it is

ready to read data.

Sector Protect / Un-protect Mode

The hardware sector protect feature disables both

program and erase operations in any sector. The

hardware sector unprotect feature re-enables both the

program and erase operations in previously protected

sectors. Sector protect/unprotect can be implemented

via two methods.

The primary method requires VID on the ESET

only, and can be implemented either in-system or via

programming equipment.

Figure 16 shows the algorithms and Figure 15 shows

the timing diagram. This method uses standard

microprocessor bus cycle timing. For sector unprotect,

all unprotected sectors must first be protected prior to

the first sector unprotect write cycle.

The alternate method intended only for programming

equipment requires VID on address pin A9, OE , and

ESET

Auto-select Mode

The auto-select mode provides manufacturer and

device identification and sector protection verification,

through outputs on DQ7–DQ0. This mode is primarily

intended for programming equipment to automatically

match

device

programmed

with

its

corresponding programming algorithm. However, the

auto-select codes can also be accessed in-system

through the command register.

When using programming equipment, this mode

requires VID (11.5 V to 12.5 V) on address pin A9. While

address pins A3, A2, A1, and A0 must be as shown in

Table 4.

To verify sector protection, all necessary pins have to

be set as required in Table 4, the programming

equipment may then read the corresponding identifier

code on DQ7-DQ0.

To access the auto-select codes in-system, the host

system can issue the auto-select command via the

command register, as shown in Table 5. This method

does not require VID. See “ Software Command

Definitions” for details on using the auto-select mode.

7.2 Software Command Definitions

Writing specific address and data commands or

sequences into the command register initiates the

device operations. Table 5 defines the valid register

command sequences. Writing incorrect address and

data values or writing them in the improper sequence

resets the device to reading array data.

All addresses are latched on the falling edge of WE

or CE, whichever happens later. All data is latched on

the rising edge of WE or CE, whichever happens

first. Refer to the corresponding timing diagrams in the

AC Characteristics section.

F49L004BA Datasheet(PDF) 9 Page - Elite Semiconductor Memory Technology Inc.

F49L004BA Datasheet(HTML) 9 Page - Elite Semiconductor Memory Technology Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Datasheet Download

Link URL