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F49L004BA Datasheet(PDF) 21 Page - Elite Semiconductor Memory Technology Inc. |
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F49L004BA Datasheet(HTML) 21 Page - Elite Semiconductor Memory Technology Inc. |
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21 / 46 page ![]() EFST preliminary F49L004UA / F49L004BA Elite Flash Storage Technology Inc. Publication Date : Aug. 2003 Revision: 0.2 21/46 10.2 Program/Erase Operation Table 11. WE Controlled Program/Erase Operations(TA = 0C to 70C, VCC = 2.7V~3.6V) -70 -90 Symbol Description Min. Max. Min. Max. Unit tWC Write Cycle Time (Note 1) 70 90 ns tAS Address Setup Time 0 0 ns tAH Address Hold Time 45 45 ns tDS Data Setup Time 35 35 ns tDH Data Hold Time 0 0 ns tOES Output Enable Setup Time 0 0 ns tGHWL Read Recovery Time Before Write (OE High to WE low) 00 ns tCS CE Setup Time 00 ns tCH CE Hold Time 00 ns tWP Write Pulse Width 35 35 ns tWPH Write Pulse Width High 30 30 ns tWHWH1 Programming Operation (Note 2) (Byte program time) 9(typ.) 9(typ.) us tWHWH2 Sector Erase Operation (Note 2) 0.7(typ.) 0.7(typ.) sec tVCS VCC Setup Time (Note 1) 50 50 us tRB Recovery Time from RY/BY 00 ns tbusy Program/Erase Valid to RY/BY Delay 90 90 ns Notes : 1. Not 100% tested. 2. See the "Erase and Programming Performance" section for more information. |
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