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LPC2470 Datasheet(PDF) 28 Page - NXP Semiconductors |
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LPC2470 Datasheet(HTML) 28 Page - NXP Semiconductors |
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28 / 72 page ![]() LPC2470_0 © NXP B.V. 2007. All rights reserved. Preliminary data sheet Rev. 00.01 — 5 October 2007 28 of 72 NXP Semiconductors LPC2470 Fast communication chip 7.4 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 interrupt request inputs which can be programmed as FIQ or vectored IRQ types. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. FIQs have the highest priority. If more than one request is assigned to FIQ, the VIC ORs the requests to produce the FIQ signal to the ARM processor. The fastest possible FIQ latency is achieved when only one request is classified as FIQ, because then the FIQ Fig 4. LPC2470 memory map 0.0 GB 1.0 GB 0x0000 0000 RESERVED ADDRESS SPACE SPECIAL REGISTERS ON-CHIP STATIC RAM RESERVED ADDRESS SPACE 0x4000 0000 0x3FFF 8000 0x3FFF FFFF 2.0 GB 0x8000 0000 0x7FFF FFFF BOOT ROM 3.75 GB 4.0 GB 3.5 GB AHB PERIPHERALS APB PERIPHERALS 0xE000 0000 0xF000 0000 0xFFFF FFFF 002aad316 |
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