HT48R53 datasheet(9/35 Pages) HOLTEK

9 / 35 page

HT48R52/HT48R53

Rev. 1.20

December 6, 2005

Arithmetic and logic unit

- ALU

This circuit performs 8-bit arithmetic and logic opera-

tions. The ALU provides the following functions:

· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)

· Logic operations (AND, OR, XOR, CPL)

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ ....)

The ALU not only saves the results of a data operation

but also changes the status register.

Status Register

- STATUS

This 8-bit register (0AH) contains the zero flag (Z), carry

flag (C), auxiliary carry flag (AC), overflow flag (OV),

power down flag (PDF), and watchdog time-out flag

(TO). It also records the status information and controls

the operation sequence.

With the exception of the TO and PDF flags, bits in

the status register can be altered by instructions like

most other registers. Any data written into the status

tion, operations related to the status register may

give different results from those intended. The TO

flag can be affected only by a system power-up, a

WDT time-out or executing the

²CLR WDT² or

²HALT² instruction. The PDF flag can be affected

only by executing the

²HALT² or ²CLR WDT² instruc-

tion or during a system power-up.

The Z, OV, AC and C flags generally reflect the status of

the latest operations.

In addition, on entering the interrupt sequence or exe-

cuting the subroutine call, the status register will not be

automatically pushed onto the stack. If the contents of

the status are important and if the subroutine can cor-

rupt the status register, precautions must be taken to

save it properly.

Interrupt

The device provides an external interrupt and internal

timer/event counter interrupts. The Interrupt Control

to set the enable or disable and the interrupt request

flags.

Once an interrupt subroutine is serviced, all the other in-

terrupts will be blocked (by clearing the EMI bit). This

scheme may prevent any further interrupt nesting. Other

interrupt requests may occur during this interval but only

the interrupt request flag is recorded. If a certain inter-

Bit No.

Label

Function

C is set if an operation results in a carry during an addition operation or if a borrow does not

take place during a subtraction operation, otherwise C is cleared. C is also affected by a

rotate through carry instruction.

1AC

AC is set if an operation results in a carry out of the low nibbles in addition or no borrow

from the high nibble into the low nibble in subtraction, otherwise AC is cleared.

Z is set if the result of an arithmetic or logic operation is zero, otherwise Z is cleared.

3OV

OV is set if an operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit, or vice versa, otherwise OV is cleared.

PDF

PDF is cleared by system power-up or executing the

²CLR WDT² instruction. PDF is set by

executing the

²HALT² instruction.

5TO

TO is cleared by a system power-up or executing the

²CLR WDT² or ²HALT² instruction.

TO is set by a WDT time-out.

6, 7

Unused bit, read as

²0²

STATUS (0AH) Register

Bit No.

Label

Function

EMI

Controls the master (global) interrupt (1=enable; 0=disable)

EEI

Controls the external interrupt (1=enable; 0=disable)

ETI

Controls the Timer/Event Counter 0 interrupt (1=enable; 0=disable)

Unused bit, read as

²0²

EIF

External interrupt request flag (1=active; 0=inactive)

Internal Timer/Event Counter 0 request flag (1=active; 0=inactive)

6, 7

Unused bit, read as

²0²

INTC (0BH) Register

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