CY2285
2
Pin Configurations
Pin Summary: CY2285-1, CY2285-3
Name
Pins
Description
VDD
8, 12, 19, 28
3.3V Power supply voltage
VDDCPU
25
2.5V Power supply for CPU clocks
VSS
1, 7, 15, 21, 22
Ground
XTALIN[3]
2
Reference crystal input
XTALOUT[3]
3
Reference crystal feedback
PCI_STOP
20
Active LOW control input to stop PCI clocks
CPU_STOP
18
Active LOW control input to stop CPU clocks
PWR_DWN
17
Active LOW control input to power down device
SEL100
16
Select for enabling 100-MHz or 66-MHz CPU clock
HIGH = 100 MHz, LOW = 66 MHz
CPUCLK[0:1]
23, 24
2.5V CPU clock outputs
PCICLK[1:5]
5, 6, 9, 10, 11
3.3V PCI clock outputs
PCICLK_F
4
3.3V Free-running PCI clock output
REF0/SPREAD
26 (-1 option)
3.3V 14.318-MHz reference clock output and power-on spread spectrum
enable strap option.
Strap LOW = Spread Spectrum enable
Strap HIGH = Spread Spectrum disable
SPREAD
26 (-3 option)
Active LOW control input to enable spread spectrum
REF1/SEL48
27
3.3V 14.318-MHz reference clock output and power-on 48-/24-MHz se-
lect strap option.
Strap LOW = 48 MHz on pin14
Strap HIGH = 24 MHz on pin14
USBCLK
13
3.3V 48-MHz USB clock output
USB_IOCLK/TS
14
3.3V 48-MHz or 24-MHz output and three-state strapping option.
Strap LOW = Enter three-state mode for testing
Strap HIGH = Normal Operation
Note:
3.
For best accuracy, use a parallel-resonant crystal, CLOAD = 18 pF.
PWRDWN
1
2
3
4
5
6
7
8
9
10
11
12
16
15
SSOP
Top View
13
14
25
24
23
22
21
17
18
19
20
28
27
26
VSSREF
XTAL_IN
PCICLK_F
XTAL_OUT
PCICLK1
VSSPCI
PCICLK2
VDDPCI
PCICLK4
VDD48
PCICLK5
USBCLK
USB_IOCLK/TS
REF1/SEL48
REF0/SPREAD
VDDCPU
CPUCLK0
CPUCLK1
VSSCPU
VSSCORE
VDDCORE
SEL100
VSS48
CPU_STOP
PCI_STOP
VDDREF
PCICLK3
PWRDWN
1
2
3
4
5
6
7
8
9
10
11
12
16
15
SSOP
Top View
13
14
25
24
23
22
21
17
18
19
20
28
27
26
REF0
XTAL_IN
PCICLK_F
XTAL_OUT
PCICLK1
VSSPCI
PCICLK2
VDDPCI
PCICLK4
EPCICLK
PCICLK5
VDD48
USBCLK/SEL100/66
REF1
SPREAD
VDDCPU
CPUCLK0
CPUCLK1
VSSCPU
VSSCORE
VDDCORE
DIV4
VSS48
CPU_STOP
PCI_STOP
VDDREF
PCICLK3
PWRDWN
1
2
3
4
5
6
7
8
9
10
11
12
16
15
SSOP
Top View
13
14
25
24
23
22
21
17
18
19
20
28
27
26
VSSREF
XTAL_IN
PCICLK_F
XTAL_OUT
PCICLK1
VSSPCI
PCICLK2
VDDPCI
PCICLK4
VDD48
PCICLK5
USBCLK
USB_IOCLK/TS
REF1/SEL48
SPREAD
VDDCPU
CPUCLK0
CPUCLK1
VSSCPU
VSSCORE
VDDCORE
SEL100
VSS48
CPU_STOP
PCI_STOP
VDDREF
PCICLK3
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