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DS3501 Datasheet(PDF) 7 Page - Maxim Integrated Products |
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DS3501 Datasheet(HTML) 7 Page - Maxim Integrated Products |
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7 / 14 page ![]() High-Voltage, NV, I2C POT with Temp Sensor and Lookup Table _____________________________________________________________________ 7 Detailed Description The DS3501 operates in one of three operating modes: Default Mode, LUT Mode, or LUT Adder Mode. In Default Mode, the DS3501 is pin and software compati- ble with the ISL95311. The potentiometer’s wiper posi- tion is controlled by the Wiper Register (WR) and the NV Initial Value Register (IVR) via the I2C interface. In LUT Mode and LUT Adder Mode, the potentiometer’s wiper position is calculated/controlled as a function of the current temperature measured by the DS3501’s internal temperature sensor. The difference between the two LUT modes is the way the potentiometer wiper position is calculated. A detailed description of the three modes as well as additional features of the DS3501 follow below. Digital Potentiometer Output The potentiometer consists of 127 resistors in series connected between the RH and RL pins. Between each resistance and at the two end points, RH and RL, solid- state switches enable RW to be connected within the resistive network. The wiper position and the output on RW are decoded based on the value in WR. If RH, RL, and RW are externally connected in a voltage-divider configuration, then the voltage on RW can be easily calculated using the following equation: where WR is the wiper position in decimal (0–127). Temperature Conversion and Supply Voltage Monitoring Temperature Conversion The DS3501 features an internal 8-bit temperature sen- sor that is capable of driving the LUT and providing a measurement of the ambient temperature over I2C by reading address 0Ch. The sensor is functional over the entire operating temperature range and is in signed two’s complement format with a resolution of 1°C/bit. See below for the temperature sensor’s bit weights. To calculate the temperature, treat the two’s comple- ment binary value as an unsigned binary number, then convert it to decimal. If the result is greater than or equal to 128, subtract 256 from the result. Supply Voltage Monitoring The DS3501 also features an internal 8-bit supply volt- age (VCC) monitor. A value of the supply voltage mea- surement can be read over I2C at the address 0Eh. To calculate the supply voltage, simply convert the hexadecimal result into decimal and then multiply it by the LSB as shown in the Analog Voltage Monitoring Characteristics electrical table. Mode Selection The DS3501 mode of operation is determined by two bits located in Control Register 1 (CR1), which is non- volatile. In particular, the mode is determined by the Update Mode bit (CR1.0) and the Adder Mode bit (CR1.1). Table 1 illustrates how the two control bits are used to select the operating mode. When shipped from the factory, the DS3501 is programmed with the CR1.0 bit = 0, hence configuring the DS3501 in Default Mode. Default Mode Default Mode of the DS3501 is the simplest mode of the three. As shown in the Default Mode Block Diagram, the potentiometer is controlled by the Wiper Register/ Initial Value Register (WR/IVR). Upon power-up of the DS3501, the value stored in the NV Initial Value Register (IVR) is recalled into the volatile Wiper Register (WR). The wiper can then be changed any time after by writing the desired value to the WR/IVR Register. The WR/IVR Register is located at memory address 00h and is implemented as EEPROM shad- owed SRAM. This register can be visualized as an SRAM byte (the WR portion) in parallel with a EEPROM byte (the IVR portion). The operation of the register is controlled by the Shadow EEPROM (SEE) bit, CR0.7. When the SEE bit = 0 (default), data written to memory address 00h by I2C actually gets stored in both SRAM (WR) and EEPROM (IVR). Conversely, when SEE = 1, only the SRAM (WR) is written to the new value. The EEPROM byte (IVR) continues to store the last value written to it when SEE was 0. Reading memory address 00h reads the value stored in WR. As shown in the Default Mode memory map (see Table 2), the SEE bit is volatile and its power-up default state is 0. VV WR VV RW RL RH RL =+ − () 127 S2 6 2 5 2 4 2 3 2 2 2 1 2 0 UPDATE MODE BIT (CR1.0) ADDER MODE BIT (CR1.1) MODE 0 X Default Mode (default) 1 0 LUT Mode 1 1 LUT Adder Mode Table 1. DS3501 Operating Modes |
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