AN754

DS00754A-page 8

 2001 Microchip Technology Inc.

Alternatively, the following equation can be used to

maintain

synchronization

during

normal

bus

operation:

Solving for Oscillator Tolerance (

∆f)

Configuring the Bit

In general, the longer the bus, the slower the maximum

data rate due to propagation delays on the line.

Increasing the oscillator tolerances between nodes can

greatly amplify the relationship.

CAN system designers must take this relationship into

consideration when defining the network. The following

examples demonstrate bit timings for achieving maxi-

mum oscillator tolerance or maximum bit rate.

EXAMPLE 2:

Maximum Oscillator

Tolerance

The maximum oscillator tolerance for a maximum data

rate is achieved when the phase segments 1 and 2 are

equal to the maximum synchronization jump width

(4TQ). Also, the propagation segment is minimum, indi-

cating a short bus and fast transceiver.

As indicated earlier, the propagation delay is twice the

delays of the bus, the receiver circuitry, and the driver.

Given:

Since the propagation segment is used to compensate

for propagation delays and must be set to the minimum

Figure 7 shows the bit timing.

FIGURE 7:

BIT TIMING FOR MAXIMUM OSCILLATOR TOLERANCE

SJW

2

∆f

() 10NBT

()

>

∆fSJW 20NBT

⁄

<

++

()

=

SyncSeg PropSeg

PhaseSeg1 (PS1)

PhaseSeg2 (PS2)

TQ

SyncSeg = 1TQ