| Electronic Components Datasheet Search |
|
AN754 Datasheet(PDF) 1 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
AN754 Datasheet(HTML) 1 Page - Microchip Technology |
|
1 / 13 page ![]() 2001 Microchip Technology Inc. DS00754A-page 1 M AN754 INTRODUCTION The Controller Area Network (CAN) protocol is an asynchronous serial bus with Non-Return to Zero (NRZ) bit coding designed for fast, robust communica- tions in harsh environments, such as automotive and industrial applications. The CAN protocol allows the user to program the bit rate, the sample point of the bit, and the number of times the bit is sampled. With these features, the network can be optimized for a given application. There are relationships between bit timing parameters, the physical bus propagation delays, and the oscillator tolerances throughout the system. This application note investigates these relationships as they pertain to Microchip’s CAN module and assists in optimizing the bit timing for given physical system attributes. THE CAN BIT TIME The CAN bit time is made up of non-overlapping seg- ments. Each of these segments are made up of integer units called Time Quanta (TQ) and are explained later in this application note. The Nominal Bit Rate (NBR) is defined in the CAN specification as the number of bits per second transmitted by an ideal transmitter with no resynchronization and can be described with the equation: Nominal Bit Time The Nominal Bit Time (NBT), or tbit, is made up of non- overlapping segments (Figure 1), therefore, the NBT is the summation of the following segments: Associated with the NBT are the Sample Point, Syn- chronization Jump Width (SJW), and Information Pro- cessing Time (IPT), which are explained later. SYNCHRONIZATION SEGMENT The Synchronization Segment (SyncSeg) is the first segment in the NBT and is used to synchronize the nodes on the bus. Bit edges are expected to occur within the SyncSeg. This segment is fixed at 1TQ. PROPAGATION SEGMENT The Propagation Segment (PropSeg) exists to com- pensate for physical delays between nodes. The prop- agation delay is defined as twice the sum of the signal’s propagation time on the bus line, including the delays associated with the bus driver. The PropSeg is pro- grammable from 1 - 8TQ. PHASE SEGMENT 1 AND PHASE SEGMENT 2 The two phase segments, PS1 and PS2 are used to compensate for edge phase errors on the bus. PS1 can be lengthened or PS2 can be shortened by resyncroni- zation. PS1 is programmable from 1 - 8TQ and PS2 is programmable from 2 - 8TQ. FIGURE 1: CAN BIT TIME SEGMENTS Author: Pat Richards Microchip Technology Inc. NBR fbit 1 tbit ------- == tbit tSyncSeg tPropSeg tPS1 tPS2 ++ + = Nominal Bit Time (NBT), tbit Sample Point SyncSeg PropSeg PhaseSeg1 (PS1) PhaseSeg2 (PS2) Understanding Microchip’s CAN Module Bit Timing |
Similar Part No. - AN754 |
|
Similar Description - AN754 |
|
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |